M29DW128G70NF6E NUMONYX, M29DW128G70NF6E Datasheet - Page 42

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M29DW128G70NF6E

Manufacturer Part Number
M29DW128G70NF6E
Description
P7ED TSOP56 DUAL BANK
Manufacturer
NUMONYX
Datasheet

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Command interface
Table 12.
1. Typical values measured at room temperature and nominal voltages.
2. Sampled, but not 100% tested.
3. Maximum value measured at worst case conditions for both temperature and V
4. Block Erase polling cycle time
5. Intrinsic program timing, that means without the time required to execute the bus cycles to load the program commands.
42/85
Chip Erase
Block Erase (128 kwords)
Erase Suspend latency time
Block Erase timeout
Word Program
Chip Program (word by word)
Chip Program (Write to Buffer Program)
Chip Program (Write to Buffer Program with V
Chip Program (Enhanced Buffered Program)
Chip Program (Enhanced Buffered Program with V
Program Suspend latency time
Program/Erase cycles (per block)
Data retention
Program, erase times and program, erase endurance cycles
Single Word Program
Write to Buffer Program
(32 words at-a-time)
(4)
(seeFigure 20: Data polling AC
Parameter
(5)
(5)
PP
/WP = V
PP
/WP = V
V
V
PP
PP
PPH
waveforms).
/WP = V
/WP = V
)
(5)
PP
)
(5)
PPH
IH
CC
100,000
after 100,000 program/erase cycles.
Min
50
20
Typ
135
40
25
16
51
78
20
13
1
8
5
5
(1)(2)
Max
400
200
400
200
50
35
40
25
15
M29DW128G
(3)
(3)
(3)
(3)
(3)
(2)
Cycles
Years
Unit
µs
µs
µs
µs
µs
s
s
s
s
s
s
s

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