C8051F340-GQR Silicon Laboratories Inc, C8051F340-GQR Datasheet - Page 244

• Manufacturer Part Number: C8051F340-GQR
• Description: MCU 8-Bit C8051F34x 8051 CISC 64KB Flash 3.3V/5V 48-Pin TQFP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F340-GQR

• Package: 48TQFP
• Device Core: 8051
• Family Name: C8051F34x
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 40
• Interface Type: I2C/SMBus/SPI/UART/USB
• On-chip Adc: 17-chx10-bit
• Number Of Timers: 4
• Ram Size: 4.25 KB
• Program Memory Size: 64 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
21.2.2. 8-bit Timers with Auto-Reload
When T2SPLIT = ‘1’ and T2CE = ‘0’, Timer 2 operates as two 8-bit timers (TMR2H and TMR2L). Both 8-bit
timers operate in auto-reload mode as shown in Figure 21.5. TMR2RLL holds the reload value for TMR2L;
TMR2RLH holds the reload value for TMR2H. The TR2 bit in TMR2CN handles the run control for TMR2H.
TMR2L is always running when configured for 8-bit Mode.
Each 8-bit timer may be configured to use SYSCLK, SYSCLK divided by 12, or the external oscillator clock
source divided by 8. The Timer 2 Clock Select bits (T2MH and T2ML in CKCON) select either SYSCLK or
the clock defined by the Timer 2 External Clock Select bit (T2XCLK in TMR2CN), as follows:
The TF2H bit is set when TMR2H overflows from 0xFF to 0x00; the TF2L bit is set when TMR2L overflows
from 0xFF to 0x00. When Timer 2 interrupts are enabled, an interrupt is generated each time TMR2H over-
flows. If Timer 2 interrupts are enabled and TF2LEN (TMR2CN.5) is set, an interrupt is generated each
time either TMR2L or TMR2H overflows. When TF2LEN is enabled, software must check the TF2H and
TF2L flags to determine the source of the Timer 2 interrupt. The TF2H and TF2L interrupt flags are not
cleared by hardware and must be manually cleared by software.
244
External Clock / 8
T2MH
0
0
1
SYSCLK / 12
T2XCLK
T2XCLK
X
0
1
0
1
Figure 21.5. Timer 2 8-Bit Mode Block Diagram
TMR2H Clock Source
SYSCLK
External Clock / 8
SYSCLK / 12
SYSCLK
0
1
1
0
M
T
H
3
M
T
3
L
CKCON
M
H
T
2
M
T
2
L
M
T
1
T
M
0
TR2
S
C
A
1
S
C
A
0
Rev. 1.3
TCLK
TCLK
TMR2RLH
TMR2RLL
TMR2H
TMR2L
T2ML
0
0
1
Reload
Reload
T2XCLK
X
0
1
To SMBus
To ADC,
T2SPLIT
T2XCLK
SMBus
TF2LEN
T2CSS
T2CE
TF2H
TF2L
TR2
TMR2L Clock Source
External Clock / 8
SYSCLK / 12
SYSCLK
Interrupt