C8051F340-GQR Silicon Laboratories Inc, C8051F340-GQR Datasheet - Page 55

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C8051F340-GQR

Manufacturer Part Number
C8051F340-GQR
Description
MCU 8-Bit C8051F34x 8051 CISC 64KB Flash 3.3V/5V 48-Pin TQFP T/R
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F340-GQR

Package
48TQFP
Device Core
8051
Family Name
C8051F34x
Maximum Speed
48 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
40
Interface Type
I2C/SMBus/SPI/UART/USB
On-chip Adc
17-chx10-bit
Number Of Timers
4
Ram Size
4.25 KB
Program Memory Size
64 KB
Program Memory Type
Flash
Operating Temperature
-40 to 85 °C

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0
5.4.2. Window Detector In Differential Mode
Figure 5.8 shows two example window comparisons for right-justified, differential data, with
ADC0LTH:ADC0LTL = 0x0040 (+64d) and ADC0GTH:ADC0GTH = 0xFFFF (-1d). In differential mode, the
measurable voltage between the input pins is between -VREF and VREF*(511/512). Output codes are rep-
resented as 10-bit 2’s complement signed integers. In the left example, an AD0WINT interrupt will be gen-
erated if the ADC0 conversion word (ADC0H:ADC0L) is within the range defined by ADC0GTH:ADC0GTL
and ADC0LTH:ADC0LTL (if 0xFFFF (-1d) < ADC0H:ADC0L < 0x0040 (64d)). In the right example, an
AD0WINT interrupt will be generated if the ADC0 conversion word is outside of the range defined by the
ADC0GT and ADC0LT registers (if ADC0H:ADC0L < 0xFFFF (-1d) or ADC0H:ADC0L > 0x0040 (+64d)).
Figure 5.9 shows an example using left-justified data with equivalent ADC0GT and ADC0LT register set-
tings.
VREF x (511/512)
VREF x (64/512)
VREF x (511/512)
VREF x (-1/512)
VREF x (64/512)
VREF x (-1/512)
Figure 5.8. ADC Window Compare Example: Right-Justified Differential Data
Input Voltage
(Px.x - Px.x)
Input Voltage
Figure 5.9. ADC Window Compare Example: Left-Justified Differential Data
(Px.x - Px.x)
-VREF
-VREF
ADC0H:ADC0L
ADC0H:ADC0L
0x7FC0
0x0FC0
0xFFC0
0x1040
0x1000
0x0000
0xFF80
0x8000
0xFFFF
0xFFFE
0x01FF
0x0041
0x0040
0x003F
0x0000
0x0200
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
ADC0GTH:ADC0GTL
ADC0LTH:ADC0LTL
ADC0GTH:ADC0GTL
ADC0LTH:ADC0LTL
not affected
not affected
not affected
not affected
AD0WINT
AD0WINT
AD0WINT
AD0WINT
AD0WINT=1
AD0WINT=1
Rev. 1.3
VREF x (511/512)
VREF x (511/512)
VREF x (64/512)
VREF x (-1/512)
VREF x (64/512)
VREF x (-1/512)
Input Voltage
(Px.x - Px.y)
Input Voltage
(Px.x - Px.x)
-VREF
-VREF
ADC0H:ADC0L
ADC0H:ADC0L
0x7FC0
0x0FC0
0xFFC0
0xFF80
0x1040
0x1000
0x0000
0x8000
0x01FF
0xFFFF
0xFFFE
0x0041
0x0040
0x003F
0x0000
0x0200
ADC0GTH:ADC0GTL
ADC0LTH:ADC0LTL
ADC0GTH:ADC0GTL
ADC0LTH:ADC0LTL
not affected
not affected
AD0WINT
AD0WINT
AD0WINT=1
AD0WINT=1
AD0WINT=1
AD0WINT=1
55

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