P87C552SBAA NXP Semiconductors, P87C552SBAA Datasheet - Page 14

• Manufacturer Part Number: P87C552SBAA
• Description: MCU 8-Bit 87C 80C51 CISC 8KB EPROM 3.3V/5V 68-Pin PLCC Tube
• Manufacturer: NXP Semiconductors

Specifications of P87C552SBAA

• Package: 68PLCC
• Device Core: 80C51
• Family Name: 87C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 40
• Interface Type: I2C/UART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Ram Size: 256 Byte
• Program Memory Size: 8 KB
• Program Memory Type: EPROM
• Operating Temperature: 0 to 70 °C

Philips Semiconductors
Mode 0 is the Shift Register mode and SM2 is ignored.
Using the Automatic Address Recognition feature allows a master to
selectively communicate with one or more slaves by invoking the
Given slave address or addresses. All of the slaves may be
contacted by using the Broadcast address. Two special Function
Registers are used to define the slave’s address, SADDR, and the
address mask, SADEN. SADEN is used to define which bits in the
SADDR are to b used and which bits are “don’t care”. The SADEN
mask can be logically ANDed with the SADDR to create the “Given”
address which the master will use for addressing each of the slaves.
Use of the Given address allows multiple slaves to be recognized
while excluding others. The following examples will help to show the
versatility of this scheme:
Slave 0
2003 Apr 01
80C51 8-bit microcontroller
8K/256 OTP, 8 channel 10 bit A/D, I
capture/compare, high I/O, low voltage (2.7 V to 5.5 V), low power
SADDR =
SADEN =
Given
=
Figure 9. UART Multiprocessor Communication, Automatic Address Recognition
START
BIT
IN UART MODE 2 OR MODE 3 AND SM2 = 1:
– WHEN OWN ADDRESS RECEIVED, CLEAR SM2 TO RECEIVE DATA BYTES
– WHEN ALL DATA BYTES HAVE BEEN RECEIVED: SET SM2 TO WAIT FOR NEXT ADDRESS.
1100 0000
1111 1101
1100 00X0
D0
SM0 / FE
INTERRUPT IF REN=1, RB8=1 AND “RECEIVED ADDRESS” = “PROGRAMMED ADDRESS”
RECEIVED ADDRESS D0 TO D7
SMOD1
PROGRAMMED ADDRESS
D0
0 : S0CON.7 = SM0
1 : S0CON.7 = FE
D1
SMOD0
SM1
D1
Figure 8. UART Framing Error Detection
D2
2
C, PWM,
POF
SM2
SM0
D2
1
1
D3
REN
SM1
D3
WLE
DATA BYTE
1
0
SET FE BIT IF STOP BIT IS 0 (FRAMING ERROR)
SM0 TO UART MODE CONTROL
D4
14
TB8
D4
SM2
GF1
Slave 1
In the above example SADDR is the same and the SADEN data is
used to differentiate between the two slaves. Slave 0 requires a 0 in
bit 0 and it ignores bit 1. Slave 1 requires a 0 in bit 1 and bit 0 is
ignored. A unique address for Slave 0 would be 1100 0010 since
slave 1 requires a 0 in bit 1. A unique address for slave 1 would be
1100 0001 since a 1 in bit 0 will exclude slave 0. Both slaves can be
selected at the same time by an address which has bit 0 = 0 (for
slave 0) and bit 1 = 0 (for slave 1). Thus, both could be addressed
with 1100 0000.
COMPARATOR
D5
1
D5
RB8
GF0
REN
1
D6
SADDR =
SADEN =
Given
D6
PD
TB8
TI
D7
X
D7
=
RB8
IDL
D8
RI
MODE 2, 3
ONLY IN
D8
1100 0000
1111 1110
1100 000X
SCON
(98H)
PCON
(87H)
TI
STOP
BIT
SU00982
RI
P87C552
SU00045
SCON
(98H)
Product data