ISPLSI 2032VE-110LTN44 LATTICE SEMICONDUCTOR, ISPLSI 2032VE-110LTN44 Datasheet - Page 11

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ISPLSI 2032VE-110LTN44

Manufacturer Part Number
ISPLSI 2032VE-110LTN44
Description
CPLD ispLSI® 2000VE Family 1K Gates 32 Macro Cells 111MHz EECMOS Technology 3.3V 44-Pin TQFP
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet

Specifications of ISPLSI 2032VE-110LTN44

Package
44TQFP
Family Name
ispLSI® 2000VE
Device System Gates
1000
Maximum Propagation Delay Time
13 ns
Number Of User I/os
32
Number Of Logic Blocks/elements
8
Typical Operating Supply Voltage
3.3 V
Maximum Operating Frequency
111 MHz
Operating Temperature
0 to 70 °C
Power consumption in the ispLSI 2032VE device de-
pends on two primary factors: the speed at which the
device is operating and the number of product terms
Figure 3. Typical Device Power Consumption vs fmax
Power Consumption
I CC can be estimated for the ispLSI 2032VE using the following equation:
For ispLSI 2032VE-300 and -225: I CC (mA) = 4.5 + (# of PTs * 1.29) + (# of nets * Fmax * 0.0068)
For ispLSI 2032VE-180 and slower: I CC (mA) = 4.5 + (# of PTs * 1.05) + (# of nets * Fmax * 0.0068)
Where:
The I CC estimate is based on typical conditions (V CC = 3.3V, room temperature) and an assumption of two
GLB loads on average exists. These values are for estimates only. Since the value of I CC is sensitive to
operating conditions and the program in the device, the actual I CC should be verified.
# of PTs = Number of product terms used in design
# of nets = Number of signals used in device
Max freq = Highest clock frequency to the device (in MHz)
150
125
100
75
50
25
0
25
50
75
Notes: Configuration of two 16-bit counters
100
Typical current at 3.3V, 25° C
125
f
max (MHz)
150
10
ispLSI 2032VE-180
used. Figure 3 shows the relationship between power
and operating speed.
and slower
Specifications ispLSI 2032VE
175
200
ispLSI 2032VE-300 and -225
225
250
275
300
0127A/2032VE

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