LFE3-35EA-6FN484I LATTICE SEMICONDUCTOR, LFE3-35EA-6FN484I Datasheet - Page 118

• Manufacturer Part Number: LFE3-35EA-6FN484I
• Description: FPGA LatticeECP3™ Family 33000 Cells 65nm Technology 1.2V 484-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFE3-35EA-6FN484I

• Package: 484FBGA
• Family Name: LatticeECP3™
• Device Logic Units: 33000
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 295
• Ram Bits: 1358848

Signal Descriptions (Cont.)
Lattice Semiconductor
D7/SPID0
DI/CSSPI0N/CEN
Dedicated SERDES Signals
PCS[Index]_HDINNm
PCS[Index]_HDOUTNm
PCS[Index]_REFCLKN
PCS[Index]_HDINPm
PCS[Index]_HDOUTPm
PCS[Index]_REFCLKP
PCS[Index]_VCCOBm
PCS[Index]_VCCIBm
1. When placing switching I/Os around these critical pins that are designed to supply the device with the proper reference or supply voltage,
2. These pins are dedicated inputs or can be used as general purpose I/O.
3. m defines the associated channel in the quad.
care must be given.
Signal Name
3
I/O
I/O
I/O
—
—
O
O
I
I
I
I
Parallel configuration I/O. SPI/SPIm data input. Open drain during configura-
tion.
Serial data input for slave serial mode. SPI/SPIm mode chip select.
High-speed input, negative channel m
High-speed output, negative channel m
Negative Reference Clock Input
High-speed input, positive channel m
High-speed output, positive channel m
Positive Reference Clock Input
Output buffer power supply, channel m (1.2V/1.5)
Input buffer power supply, channel m (1.2V/1.5V)
4-3
Description
LatticeECP3 Family Data Sheet
Pinout Information