AX5151-TSSOP24-TU AXSEM, AX5151-TSSOP24-TU Datasheet - Page 21

RF Transmitter TSSOP-Class-IC

AX5151-TSSOP24-TU

Manufacturer Part Number
AX5151-TSSOP24-TU
Description
RF Transmitter TSSOP-Class-IC
Manufacturer
AXSEM
Type
Single Chip Transceiverr
Datasheet

Specifications of AX5151-TSSOP24-TU

Package / Case
TSSOP-24
Operating Frequency
400 MHz to 940 MHz
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Operating Supply Voltage
2.3 V to 3.6 V
Supply Current
100 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.3.
The SYSCLK pin outputs the reference clock signal divided by a programmable integer.
Divisions from 1 to 2048 are possible. For divider ratios > 1 the duty cycle is 50%. Bits
SYSCLK[3:0] in the PINCFG1 register set the divider ratio. The SYSCLK output can be disabled.
Outputting a frequency that is identical to the IF frequency (default 1 MHz) on the SYSCLK pin
is not recommended during receive operation, since it requires extensive decoupling on the
PCB to avoid interference.
5.4.
AX5151 has an integrated power-on-reset block. No external POR circuit or signal at the
RESET_N pin is required, prior to POR the RESET_N pin is disabled.
After POR the AX5151 can be reset in two ways:
After POR or reset all registers are set to their default values.
If the RESET_N pin is not used it must be tied to VDD_IO.
5.5.
The RF frequency generation subsystem consists of a fully integrated synthesizer, which
multiplies the reference frequency from the crystal oscillator to get the desired RF frequency.
The advanced architecture of the synthesizer enables frequency resolutions of 1 Hz, as well as
fast settling times of 5 – 50 µs depending on the settings (see section 4.3: AC Characteristics).
Fast settling times mean fast start-up and fast RX/TX switching, which enables low-power
system design.
For receive operation the RF frequency is fed to the mixer, for transmit operation to the
power-amplifier.
The frequency must be programmed to the desired carrier frequency. The RF frequency shift
by the IF frequency that is required for RX operation, is automatically set when the receiver is
activated and does not need to be programmed by the user. The default IF frequency is 1
MHz. It can be programmed to other values. Changing the IF frequency and thus the centre
frequency of the digital channel filter can be used to adapt the blocking performance of the
device to specific system requirements.
The synthesizer loop bandwidth can be programmed, this serves three purposes:
Version 1.0
1. By SPI accesses: the bit RST in the PWRMODE register is toggled.
2. Via the RESET_N pin: A low pulse is applied at the RESET_N pin. With the rising edge of
1. Start-up time optimisation, start-up is faster for higher synthesizer loop bandwidths
2. TX spectrum optimisation, phase-noise at 300 kHz to 1 MHz distance from the carrier
SYSCLK Output
Power-on-reset (POR) and RESET_N Input
RF Frequency Generation Subsystem
RESET_N the device goes into its operational state.
improves with lower synthesizer loop bandwidths
Circuit Description
Datasheet AX5151
21

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