CY2DP314OI Cypress Semiconductor Corp, CY2DP314OI Datasheet - Page 4

• Manufacturer Part Number: CY2DP314OI
• Manufacturer: Cypress Semiconductor Corp
• Type: Clock Driverr

Specifications of CY2DP314OI

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 1500MHz
• Output Logic Level: ECL/PECL
• Operating Supply Voltage (min): -2.375/2.375V
• Operating Supply Voltage (typ): -2.5/-3.3/2.5/3.3V
• Operating Supply Voltage (max): -3.465/3.465V
• Package Type: SSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: ECL/HSTL/PECL
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-07550 Rev.*G
ECL DC Electrical Specifications
AC Electrical Specifications
V
V
V
V
V
V
V
V
F
T
V
V
Vo
tsk
tsk
t
t
tsk
T
Notes:
11. V
12. 50% duty cycle; standard load; differential operation.
13. For further information regarding jitter, please refer to the application note “Understanding data sheet jitter specifications for Cypress timing products”.
14. Output pulse skew is the absolute difference of the propagation delay times: | t
jit(per)
jit(pn)
Parameter
Parameter
CLK
PD
R
EE
CMR
OH
OL
IH
IL
PP
CMRO
DIF
X
,T
(0)
(PP)
(P)
DIF
F
(AC) is the minimum differential HSTL input voltage swing required to maintain AC characteristics including tkpd and device-to-device skew.
Negative Power Supply
ECL Input Differential cross point
voltage
Output High Voltage
Output Low Voltage
V
V
Input Voltage, High
Input Voltage, Low
ECL/PECL Input Differential Input
Voltage
Output Common Voltage Range
Input Frequency
Propagation Delay CLKA or CLKB to
Output pair
HSTL Differential Input Voltage
HSTL Input Differential Crosspoint
Voltage
Output Voltage (peak-to-peak; see
Figure 2)
Output-to-output Skew
Part-to-Part Output Skew
Output Period Jitter (peak)
Output RMS Phase Jitter
(see Figure 6)
Output Pulse Skew
Output Rise/Fall Time (see Figure 2)
EE
EE
= –3.3V ± 5%
= –2.5V ± 5%
[7]
[7]
[8]
[12]
Description
Description
[14]
[12, 13]
[12]
[13]
[11]
–2.5V ± 5%, V
–3.3V ± 5%, V
Differential operation
I
I
Single-ended operation
Single-ended operation
<660 MHz
Differential operation
50% duty cycle Standard load
PECL, ECL < 660 MHz
HSTL < 1 GHz
Duty Cycle Standard Load
Differential Operation
Standard Load Differential
Operation
< 1 GHz
156.25 MHz
156.25 MHz, broadband, 3.3V
156.25 MHz, Filtered, 3.3V
312.5 MHz, broadband, 3.3V
312.5 MHz, Filtered, 3.3V
660 MHz
50% duty cycle
Differential 20% to 80%
OH
OL
= –5 mA
= –30 mA
[12]
Condition
PLH
Condition
[12]
.
[9]
, See Figure 3
[12]
– t
, See Figure 3
[9]
CC
CC
PHL
= 0.0V
= 0.0V
|.
0.375
–1.945
Min.
0.68
0.08
V
280
280
0.1
0.4
–1.165
–2.625
–3.465
–1.995
–1.995
EE
–
–
–
–
–
–
–
–
–
–1.25
Min.
+ 1.2
[10]
V
0.175
0.266
0.260
1.425
0.159
Typ.
400
400
CC
29
95
7
–
–0.880
–2.375
–3.135
–1.625
Max.
–0.7
–1.5
–1.3
CY2DP314
0V
Max.
650
750
150
1.3
1.5
1.9
0.9
0.3
50
15
50
–
–
–
–
–
[10]
Page 4 of 10
Unit
GHz
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ns
V
V
V
V
V
V
V
V
V
V
V
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