AU7555D/01 NXP Semiconductors, AU7555D/01 Datasheet - Page 9

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AU7555D/01

Manufacturer Part Number
AU7555D/01
Description
Timers & Support Products CMOS TIMER -40 TO +125
Manufacturer
NXP Semiconductors
Type
Standardr
Datasheets

Specifications of AU7555D/01

# Internal Timers
1
Power Dissipation
780mW
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3/5/9/12/15V
Operating Supply Voltage (max)
16V
Package Type
SO
High Level Output Current
-1mA
Low Level Output Current
3.2mA
Pin Count
8
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Number Of Internal Timers
1
Supply Voltage (max)
16 V
Supply Voltage (min)
3 V
Maximum Power Dissipation
780 mW
Mounting Style
SMD/SMT
Package / Case
SOT-96
Lead Free Status / RoHS Status
Compliant
Other names
AU7555D/01,112
Philips Semiconductors Linear Products
Astable Operation
If the circuit is connected as shown in Figure 2, it will trigger itself
and free run as a multivibrator. The external capacitor charges
through R
cycle (D) may be precisely set by the ratio of these two resistors. In
this mode of operation, the capacitor charges and discharges
between 1/3 V
threshold levels are directly proportional to the supply voltage, the
frequency of oscillation is independent of the supply voltage.
Monostable Operation
In this mode of operation, the timer functions as a one-shot. Initially,
the external capacitor (C) is held discharged by a transistor inside
the timer. Upon application of a negative pulse to Pin 2,TRIGGER,
the internal flip-flop is set which releases the low impedance on
DISCHARGE; the external capacitor charges and drives the
OUTPUT High. The voltage across the capacitor increases
exponentially with a time constant t = R
across the capacitor equals 2/3 V
flip-flop, which in turn discharges the capacitor rapidly and also
drives the OUTPUT to its low state. TRIGGER must return to a high
state before the OUTPUT can return to a low state.
Control Voltage
The CONTROL VOLTAGE terminal permits the two trip voltages for
the THRESHOLD and TRIGGER internal comparators to be
controlled. This provides the possibility of oscillation frequency
modulation in the astable mode, or even inhibition of oscillation,
depending on the applied voltage. In the monostable mode, delay
times can be changed by varying the applied voltage to the
CONTROL VOLTAGE pin.
RESET
The RESET terminal is designed to have essentially the same trip
voltage as the standard bipolar 555, i.e., 0.6 to 0.7V. At all supply
voltages it represents an extremely high input impedance. The
mode of operation of the RESET function is, however, much
August 31, 1994
F =
General purpose CMOS timer
(R
A
A
1.38
+ 2R
and R
DD
B
)
B
and 2/3 V
C
and discharges through R
D =
DD
. Since the charge rate and the
R
R
A
+
A
, the comparator resets the
+ 2R
+ R
B
A
B
C. When the voltage
B
only. Thus, the duty
345
improved over the standard bipolar 555 in that it controls only the
internal flip-flop, which in turn controls simultaneously the state of
the OUTPUT and DISCHARGE pins. This avoids the multiple
threshold problems sometimes encountered with slow falling edges
in the bipolar devices.
OUTPUT
V
t = 1.05 R
DD
< 18V
A
V
Figure 3. Monostable Operation
DD
1
2
3
4
C
R A
R
C
B
Figure 2. Astable Operation
TRIGGER
OUTPUT
RESET
V
DD
1
2
3
4
GND
TRIGGER
OUTPUT
RESET
THRESHOLD
DISHCARGE
CONTROL
VOLTAGE
THRESHOLD
DISHCARGE
CONTROL
VOLTAGE
8
7
6
5
V
DD
Product specification
ICM7555
CAPACITOR
OPTIONAL
R A
8
7
6
5
V
DD
C

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