KSZ8993MLI Micrel Inc, KSZ8993MLI Datasheet - Page 72

2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, 128-Ld PQFP( , I-Temp)

KSZ8993MLI

Manufacturer Part Number
KSZ8993MLI
Description
2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, 128-Ld PQFP( , I-Temp)
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8993MLI

Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Fiber Support
Yes
Integrated Led Drivers
Yes
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.89/3.465V
Operating Supply Voltage (min)
1.71/3.135V
Power Dissipation
800mW
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Supplier Unconfirmed
Other names
576-3350

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8993MLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8993MLI
Manufacturer:
MICREL/麦瑞
Quantity:
20 000
Offset
0x1B
0x1C
0x1D
0x1E
0x1F
“All Port Dropped Packet” MIB counters are read using indirect memory access. The address offsets for these
counters are shown in the following table:
Micrel, Inc.
October 2008
Bit
30-16
15-0
Examples:
1. MIB Counter Read (Read port 1 “Rx64Octets” Counter)
2. MIB Counter Read (Read Port 2 “Rx64Octets” Counter)
Counter Name
TxDeferred
TxTotalCollision
TxExcessiveCollision
TxSingleCollision
TxMultipleCollision
Then
Offset
0x100
0x101
0x102
0x103
0x104
0x105
Write to reg. 110 with 0x1c (read MIB counters selected)
Write to reg. 111 with 0x0e (trigger the read operation)
Read reg. 117 (counter value 30-24) // If bit 30 = 0, restart (reread) from this register
Read reg. 118 (counter value 23-16)
Read reg. 119 (counter value 15-8)
Read reg. 120 (counter value 7-0)
Write to reg. 110 with 0x1c (read MIB counter selected)
Write to reg. 111 with 0x2e (trigger the read operation)
Name
Reserved
Counter values
Table 19. “All Port Dropped Packet” MIB Counters Indirect Memory Offsets
Table 17. Port 1’s “Per Port” MIB Counters Indirect Memory Offsets
Counter Name
Port1 TX Drop Packets
Port2 TX Drop Packets
Port3 TX Drop Packets
Port1 RX Drop Packets
Port2 RX Drop Packets
Port3 RX Drop Packets
Table 18. Format of “All Port Dropped Packet” MIB Counters
R/W
N/A
RO
Description
Tx packets by a port for which the 1st Tx attempt is delayed due to the busy
medium
Tx total collision, half duplex only
A count of frames for which Tx fails due to excessive collisions
Successfully Tx frames on a port for which Tx is inhibited by exactly one collision
Successfully Tx frames on a port for which Tx is inhibited by more than one collision
Description
Reserved
Counter value
Description
TX packets dropped due to lack of resources
TX packets dropped due to lack of resources
TX packets dropped due to lack of resources
RX packets dropped due to lack of resources
RX packets dropped due to lack of resources
RX packets dropped due to lack of resources
72
Default
N/A
0
M9999-020606
KSZ8993M/ML

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