KSZ8993MLI Micrel Inc, KSZ8993MLI Datasheet - Page 73

2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, 128-Ld PQFP( , I-Temp)

KSZ8993MLI

Manufacturer Part Number
KSZ8993MLI
Description
2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, 128-Ld PQFP( , I-Temp)
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8993MLI

Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Fiber Support
Yes
Integrated Led Drivers
Yes
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.89/3.465V
Operating Supply Voltage (min)
1.71/3.135V
Power Dissipation
800mW
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Supplier Unconfirmed
Other names
576-3350

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8993MLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8993MLI
Manufacturer:
MICREL/麦瑞
Quantity:
20 000
Additional Information
Both “Per Port” and “All Port Dropped Packet” MIB counters do not indicate overflow. The application must keep
track of overflow conditions for these counters.
“All Port Dropped Packet” MIB counters do not indicate if count is valid. The application must keep track of valid
conditions for these counters.
To read out all the counters, the best performance over the SPI bus is (160+3)*8*200 = 260ms, where there are
160 registers, 3 overheads, 8 clocks per access, at 5MHz. In the heaviest condition, the counters will overflow in 2
minutes. It is recommended that the software read all the counters at least every 30 seconds.
A high performance SPI master is also recommended to prevent counters overflow.
Per Port MIB counters are designed as “read clear.” That is, these counters will be cleared after they are read.
“All Port Dropped Packet” MIB counters are not cleared after they are read.
Micrel, Inc.
October 2008
3. MIB Counter Read (Read “Port1 TX Drop Packets” Counter)
Then,
Then
Read reg. 117 (counter value 30-24) // If bit 30 = 0, restart (reread) from this register
Read reg. 118 (counter value 23-16)
Read reg. 119 (counter value 15-8)
Read reg. 120 (counter value 7-0)
Write to reg. 110 with 0x1d (read MIB counter selected)
Write to reg. 111 with 0x00 (trigger the read operation)
Read reg. 119 (counter value 15-8)
Read reg. 120 (counter value 7-0)
73
M9999-020606
KSZ8993M/ML

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