DJLXT905LC.C2 831645 Intel, DJLXT905LC.C2 831645 Datasheet - Page 11

• Manufacturer Part Number: DJLXT905LC.C2 831645
• Manufacturer: Intel

Specifications of DJLXT905LC.C2 831645

• Lead Free Status / RoHS Status: Not Compliant

2.2
2.3
Datasheet
Document Number: 249271
Revision Number: 004
Revision Date: 19-Oct-2005
Table 2.
Controller Compatibility Modes
The LXT905 is compatible with most industry standard controllers, including devices from
Advanced Micro Devices* (AMD), Fujitsu*, National Semiconductor*, Seeq*, Motorola*, and
Texas Instruments*. Four different control signal timing and polarity schemes (Modes 1 through 4)
provide this compatibility. The MD0 and MD1 mode select pins determine controller compatibility
modes (see
and parameters.
Transmit Function
The LXT905 receives NRZ data from the controller at the TXD input, as shown in
Diagram” on page
encoded data to the twisted-pair network (TPO circuit). The advanced integrated pulse shaping and
filtering network produces the output signal on TPON and TPOP, as shown in
Output Waveform” on page
10BASE-T jitter template. An internal, continuous resistor-capacitor filter removes any high-
frequency clocking noise from the pulse shaping circuitry. Integrated filters simplify the design
work required for FCC compliant EMI performance. During idle periods, the LXT905 transmits
link integrity test pulses on the TPO circuit (if LI is enabled and LBK is disabled).
Controller Compatibility Mode Options
Mode 1 - For Motorola* MC68EN360 or compatible controllers (AMD* AM7990)
Mode 2 - For Intel* 82596 or compatible controllers
Mode 3 - For Fujitsu* MB86950, MB86960 or compatible controllers (Seeq* 8005)
Mode 4 - For TI* TMS380C26 or compatible controllers
1. Refer to the MAC Interface Design Guide for Intel Controllers Application Note when designing with Intel
2. SEEQ* controllers require inverters on CLKI, LBK, RCLK, and COL.
controllers.
Table
2). Refer to
6, and passes it through a Manchester encoder. The LXT905 then transfers
10. The TPO output is pre-distorted and pre-filtered to meet the
LXT905 Universal 10BASE-T Transceiver with 3.3V Support
Section 4.0, “Test Specifications” on page 23
Controller Mode
1
2
for timing diagrams
Figure 3 “TPO
MD1
High
High
Low
Low
Figure 1 “Block
MD0
High
High
Low
Low
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