L80223/D LSI, L80223/D Datasheet - Page 45

• Manufacturer Part Number: L80223/D
• Manufacturer: LSI

Specifications of L80223/D

• Lead Free Status / RoHS Status: Not Compliant

2.3.12.2 10 Mbits/s
2.3.12.3 Collision Test
2.3.12.4 Collision Indication
collision is detected, the COL output is asserted, TP data continues to
be transmitted on the twisted-pair outputs, TP data continues to be
received on the twisted-pair inputs, and internal CRS loopback is
disabled. After a collision is in process, CRS is asserted and stays
asserted until the receive and transmit packets that caused the collision
are terminated.
The collision function is disabled if the device is in the Full-Duplex mode,
is in the Link Fail state, or if the device is in the diagnostic loopback
mode.
A collision in the 10 Mbits/s mode is identical to one the 100 Mbits/s
mode except
To test the Controller Interface collision signal (COL), set the COLTST bit
in the MI serial port Control register. When this bit is set, TX_EN is
looped back onto COL and the TP outputs are disabled.
Collisions are indicated through the COL pin, which is asserted HIGH
every time a collision occurs. The device can also be programmed to
indicate collisions on the PLED2n output.
In the MI serial port Configuration register, set the LED function select
bits (LED_DEF_[1:0]) so that collision activity is indicated at the PLED2n
output. Set the PLED2_[1:0] bits in the same register to 0b11 (normal).
With these settings, an LED connected to the PLED2n pin will reflect
collision activity.
Block Diagram Description
the 10 Mbits/s squelch criteria determines reception
the RXD[3:0] outputs are forced to all zeros
the collision signal (COL) is asserted when the SQE test is
performed
the collision signal (COL) is asserted when the jabber condition has
been detected.
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