DJLXT971ALE.A4 Cortina Systems Inc, DJLXT971ALE.A4 Datasheet - Page 65

• Manufacturer Part Number: DJLXT971ALE.A4
• Manufacturer: Cortina Systems Inc

Specifications of DJLXT971ALE.A4

• Lead Free Status / RoHS Status: Not Compliant

LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
Table 31
Table 32
7.2
Cortina Systems
10BASE-T Link Integrity Timing Characteristics
Thermal Characteristics
AC Timing Diagrams and Parameters
See the following timing diagrams and AC parameters:
®
Time Link Loss Receive
Link Pulse
Link Min Receive Timer
Link Max Receive Timer
Link Transmit Period
Link Pulse Width
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
Package
Theta-JA
Theta-JC
Psi - JT
• Figure 28, 100BASE-TX Receive Timing - 4B Mode, on page 66
• Figure 29, 100BASE-TX Transmit Timing - 4B Mode, on page 67
• Figure 30, 100BASE-FX Receive Timing, on page 68
• Figure 31, 100BASE-FX Transmit Timing, on page 69
• Figure 32, 10BASE-T Receive Timing, on page 70Figure 33, 10BASE-T Receive
• Figure 35, 10BASE-T Jabber and Unjabber Timing, on page 73
• Figure 36, 10BASE-T SQE (Heartbeat) Timing, on page 73
• Figure 37, Auto-Negotiation and Fast Link Pulse Timing, on page 74
• Figure 38, Fast Link Pulse Timing, on page 74
• Figure 39, MDIO Input Timing, on page 75
• Figure 40, MDIO Output Timing, on page 75
• Figure 41, Power-Up Timing, on page 76
• Figure 42, RESET_L Pulse Width and Recovery Timing, on page 76
LXT971A Single-Port 10/100 Mbps PHY Transceiver
testing.
Timing, on page 70
Parameter
Parameter
1 0x 10 x1.4 64 LD LQFP
58 C/W
27 C/W
3.4 C/W
T
Symbol
T
LR
LR
Tlpw
T
T
LXT971A
Tlt
LL
LP
M
M
AX
IN
Min
50
50
60
2
2
8
10 x 10 x 1.4 64 LQFP
56 C/W
25 C/W
3.0 C/W
Typ
–
–
–
–
–
–
LXT971ALE
Value
Max
150
150
150
24
7
7
Link Pulses
7.2 AC Timing Diagrams and
Units
ms
ms
ms
ms
7 x 7 x .96 64 BGA-CSP
42 C/W
20 C/W
–
ns
LXT971ABE
Test Conditions
Parameters
–
–
–
–
–
–
Page 65