DJLXT971ALE.A4 Cortina Systems Inc, DJLXT971ALE.A4 Datasheet - Page 68

• Manufacturer Part Number: DJLXT971ALE.A4
• Manufacturer: Cortina Systems Inc

Specifications of DJLXT971ALE.A4

• Lead Free Status / RoHS Status: Not Compliant

LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
Figure 30
Table 35
Cortina Systems
100BASE-FX Receive Timing
100BASE-FX Receive Timing Parameters
®
RXD[3:0], RX_DV, set up
to RX_CLK High
RXD[3:0], RX_DV, RX_ER
from RX_CLK High
CRS asserted to RXD[3:0], RX_DV
Receive start of “J” to CRS asserted
Receive start of “T” to CRS de-asserted
Receive start of “J” to COL asserted
Receive start of “T” to COL de-asserted
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
2. BT (Bit Time) is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit
3. The RX_ER signal is not shown in the figure.
LXT971A Single-Port 10/100 Mbps PHY Transceiver
testing.
rate. 100BASE-T bit time = 10
RXD[3:0]
RX_CLK
Parameter
RX_DV
TPFI
CRS
COL
0ns
3
hold
-8
s or 10 ns.
t4
t6
Sym
t1
t2
t3
t4
t5
t6
t7
Min
10
10
12
16
10
14
3
t3
Typ
250ns
–
–
–
–
–
–
–
1
Max
16
22
15
18
–
–
5
t5
t7
t1
7.2 AC Timing Diagrams and
t2
Units
BT
BT
BT
BT
BT
ns
ns
B3452-02
2
Test Conditions
Parameters
–
–
–
–
–
–
–
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