HBLXT9781HC.C4 Intel, HBLXT9781HC.C4 Datasheet - Page 41

• Manufacturer Part Number: HBLXT9781HC.C4
• Manufacturer: Intel

Specifications of HBLXT9781HC.C4

• Lead Free Status / RoHS Status: Not Compliant

2.9.4
Datasheet
Event
LED
Note: The direct drive LED outputs in this diagram are shown as active Low.
QSTAT
Figure 18. LED Pulse Stretching
Figure 19. Quick Status Register
1. QCLK is used to output the above information.
2. Bits D15 and D0 are always set to 0.
stretch
Using the Quick Status Register
The LXT97x1 continuously sends out the Quick Status Register (Address 17) contents on the
QSTAT pin.
This output provides a continuous, real-time status update of several different LXT97x1 attributes
and modes. The information can be used to sense RX, TX, COL and to monitor the status and
speed of the auto-negotiation process.
A simple signature is used to delineate the start of the QSTAT register information allowing a very
simple interface to be designed. The 16 bits of the Quick Status Register are separated by a 16-bit
signature frame (1111111111111111).
The LXT97x1 sources this status information separated by the signature with respect to the falling
edge of the QCLK input. This allows an ASIC to provide only 1 clock output for multiple PHY
devices. The ASIC can also select a frequency up to 25 MHz to operate this interface. Refer to
Table 45 on page 71
D15
D15
(0)
1
(0)
D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4
D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4
D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
1
1
Fast Ethernet 10/100 Multi-Port Transceiver with RMII — LXT9761/9781
1
for Quick Status bits descriptions.
1
stretch
QUICK STATUS REGISTER-Port 0
QUICK STATUS REGISTER-Port n
16 BIT SIGNATURE
1
1
1
1
1
1
1
D3 D2 D1 D0
D3 D2 D1 D0
1
1
stretch
1
(0)
(0)
1
Port 2 thru n-1
41