LULXT9785MBC.D0S L7WN Intel, LULXT9785MBC.D0S L7WN Datasheet - Page 183

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LULXT9785MBC.D0S L7WN

Manufacturer Part Number
LULXT9785MBC.D0S L7WN
Description
Manufacturer
Intel
Datasheet

Specifications of LULXT9785MBC.D0S L7WN

Lead Free Status / RoHS Status
Compliant
Datasheet
Document Number: 249241
Revision Number: 010
Revision Date: 30-May-2006
Figure 44. SMII - 10BASE-T Transmit Timing
Table 65. SMII-10BASE-T Transmit Timing Parameters
SYNC setup to REFCLK rising edge and
TxData setup to REFCLK rising edge
SYNC hold to REFCLK rising edge and
TxData hold from REFCLK rising edge
TxEN sampled to start-of-frame
NOTE: The table latency values are derived with the hardware configuration pins FIFOSEL[1:0] set at a
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. “BT” signifies bit times at the line rate (that is, BT = 100 ns if using 10BASE-T, BT = 10 ns if using
testing.
100BASE-TX or 100BASE-FX).
default configuration of 00 (32 bits of initial fill).
REFCLK
TxData
SYNC
TPFO
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Parameter
t
1
t
2
t
3
Sym
t1
t2
t3
Min
1.5
1.0
Typ
t
1
10
1
t
2
Max
14
Units
BT
ns
ns
2
Conditions
Test
183

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