UBA2211BP/N1 NXP Semiconductors, UBA2211BP/N1 Datasheet - Page 5
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
UBA2211BP/N1
Manufacturer Part Number
UBA2211BP/N1
Description
CFL DRIVER, HALF-BRIDGE, 8DIP
Manufacturer
NXP Semiconductors
Datasheet
1.UBA2211APN1112.pdf
(19 pages)
Specifications of UBA2211BP/N1
Driver Case Style
DIP
No. Of Pins
8
Operating Temperature Range
-40°C To +150°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
7. Functional description
UBA2211
Preliminary data sheet
7.1 Supply voltage
7.2 Start-up state
7.3 Reset
7.4 Oscillation control
The UBA2211 family is powered using the start-up current source and the V
When the voltage on pin HV increases, the V
internal Junction gate Field-Effect Transistor (JFET) current source. The voltage on pin
V
half-bridge starts switching causing the charge pump activate and in turn supply V
The amount of current flowing towards V
momentary frequency. The charge pump consists of an external half-bridge capacitor
(C
However, with the DIP8 package, these diodes must be mounted externally. The Zener
diode ensures the V
The DVDT supply has its own ground pin (PGND) to prevent large peak currents from
flowing through the external small signal ground pin (SGND).
The start-up current source is enabled when the voltage on pin V
When the supply voltage on pin V
start-up state the High-Side Power Transistor (HSPT) is switched off and the Low-Side
Power Transistor (LSPT) is switched on. The circuit is reset and the capacitors on the
bootstrap pin FS (C
and SW are switched to ground.
When pin V
entered. If the voltage on pin V
state.
Remark: If OTP is active, the IC remains in the start-up state for as long as this is the
case. The V
A DC reset circuit is incorporated in the high-side driver. The high-side transistor is
switched off when the voltage on pin FS is below the high-side lockout voltage.
The oscillation frequency is based on the 555-timer function. A self oscillating circuit is
created comprising the external components: resistors R
The nominal oscillating frequency is determined by R
An internal divider 0.5 × f
divider sets the bridge frequency at half the oscillator frequency.
Signal V
in all states except preheat. Signal V
determine the frequency during the preheat state.
DD
DVDT
rises until V
). The SO14 package contains two internal diodes with an internal Zener diode.
SW
DD
is generated by the input on pin SW and it is used to determine the frequency
DD
is above V
voltage slowly oscillates between V
All information provided in this document is subject to legal disclaimers.
DD
equals V
bs
DD
) and the low-voltage supply pin V
Rev. 2.1 — 7 March 2011
voltage cannot rise above the maximum V
osc(int)
DD(start)
DD(start)
DD
is used to generate the accurate 50 % duty cycle. The
, the start-up state is exited and the preheat state is
DD
falls below V
. The start-up current source is then disabled. The
SW(ph)
increases, the IC enters the start-up state. In the
DD
is an internally generated signal used to
equals V
Half-bridge power IC family for CFL lamps
DD
DD(stop)
capacitor (C
DD
HV
osc
, the system returns to the start-up
= V
× C
DD
and C
osc
DD(stop)
DVDT
(C
, R
VDD
VDD
SENSE
osc
× f where f represents the
) is charged using the
) are charged. Pins RC
and V
DD
.
DD
is below V
rating.
and capacitor C
UBA2211
DD
© NXP B.V. 2011. All rights reserved.
= V
DD
DD(start)
DD(stop)
supply.
DD
.
5 of 19
.
osc
.
.