PIC16F707-I/MV Microchip Technology, PIC16F707-I/MV Datasheet - Page 113
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PIC16F707-I/MV
Manufacturer Part Number
PIC16F707-I/MV
Description
14KB Flash Program, MTouch, 32ch CSM, 1.8V-5.5V, 16MHz Internal Oscillator, 8b A
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet
1.PIC16F707-IPT.pdf
(284 pages)
Specifications of PIC16F707-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
363 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-UFQFN Exposed Pad
Processor Series
PIC16F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- Current page: 113 of 284
- Download datasheet (3Mb)
REGISTER 14-1:
TABLE 14-2:
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
CPSACON0
CPSBCON0
PIE2
PIR2
TACON
TBCON
TMRA
TMRB
TRISA
TRISC
Legend:
TMRxON
Name
R/W-0/0
– = Unimplemented locations, read as ‘0’. Shaded cells are not used by the TimerA/B modules.
TMR3GIE
TMR3GIF
TMRAON
TMRBON
CPSAON
CPSBON
TRISA7
TRISC7
Bit 7
TMRxON: TimerA/TimerB On/Off Control bit
1 = Timerx is enabled
0 = Timerx is disabled
Unimplemented: Read as ‘0’
TMRxCS: TMRx Clock Source Select bit
1 = Transition on TxCKI pin or CPSxOSC signal
0 = Internal instruction cycle clock (F
TMRxSE: TMRx Source Edge Select bit
1 = Increment on high-to-low transition on TxCKI pin
0 = Increment on low-to-high transition on TxCKI pin
TMRxPSA: Prescaler Assignment bit
1 = Prescaler is disabled. Timer clock input bypasses prescaler.
0 = Prescaler is enabled. Timer clock input comes from the prescaler output.
TMRxPS<2:0>: Prescaler Rate Select bits
SUMMARY OF REGISTERS ASSOCIATED WITH TIMERA/B
U-0
—
TxCON: TIMERA/TIMERB CONTROL REGISTER
CPSARM
CPSBRM
TMR3IE
TMR3IF
TRISA6
TRISC6
Bit 6
—
—
BIT VALUE
000
001
010
011
100
101
110
111
W = Writable bit
‘1’ = Bit is set
TMRxCS
R/W-0/0
TMRBIE
TMRBIF
TRISA5
TRISC5
TACS
TBCS
Bit 5
—
—
TMRx RATE
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
TMRAIE
TMRAIF
TimerA Module Register
TimerB Module Register
TRISA4
TRISC4
TASE
TBSE
Bit 4
—
—
TMRxSE
R/W-0/0
Preliminary
OSC
CPSARNG1
CPSBRNG1
TRISC3
TRISA3
TAPSA
TBPSA
Bit 3
PIC16F707/PIC16LF707
/4)
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TMRxPSA
R/W-0/0
CPSARNG0
CPSBRNG0
TRISA2
TRISC2
TBPS2
TAPS2
Bit 2
—
—
TMRxPS2
R/W-0/0
CPSAOUT
CPSBOUT
TRISA1
TRISC1
TAPS1
TBPS1
Bit 1
—
—
CCP2IE
CCP2IF
TRISC0
TRISA0
TAXCS
TBXCS
TBPS0
TAPS0
Bit 0
x = Bit is unknown
TMRxPS1
R/W-0/0
00-- 0000
00-- 0000
0000 ---0
0000 ---0
0-00 0000
0-00 0000
0000 0000
0000 0000
1111 1111
1111 1111
POR, BOR
Value on
DS41418A-page 113
TMRxPS0
R/W-0/0
00-- 0000
00-- 0000
0000 ---0
0000 ---0
0-00 0000
0-00 0000
0000 0000
0000 0000
1111 1111
1111 1111
Value on
all other
Resets
bit 0
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