PIC16LF1847T-I/SO Microchip Technology, PIC16LF1847T-I/SO Datasheet - Page 36

• Manufacturer Part Number: PIC16LF1847T-I/SO
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ mTouch™ 16Fr

Specifications of PIC16LF1847T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (0.295", 7.50mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16(L)F1847
TABLE 3-8:
DS41453B-page 36
380h
381h
382h
383h
384h
385h
386h
387h
388h
389h
38Ah
38Bh
38Ch
38Dh
38Eh
38Fh
390h
391h
392h
393h
394h
395h
396h
397h
398h
399h
39Ah
39Bh
39Ch
39Dh
39Eh
39Fh
Legend:
Note
Address
Bank 7
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
1:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
—
—
—
—
—
—
—
—
IOCBP
IOCBN
IOCBF
—
—
—
CLKRCON
—
MDCON
MDSRC
MDCARL
MDCARH
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
These registers can be addressed from any bank.
Name
Shaded locations are unimplemented, read as ‘0’.
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
MDMSODIS
MDCHODIS MDCHPOL MDCHSYNC
MDCLODIS
CLKREN
IOCBP7
IOCBN7
IOCBF7
MDEN
Bit 7
GIE
—
—
—
Write Buffer for the upper 7 bits of the Program Counter
MDCLPOL
CLKROE
IOCBP6
IOCBN6
IOCBF6
MDOE
Bit 6
PEIE
—
—
—
MDCLSYNC
CLKRSLR
TMR0IE
IOCBP5
IOCBN5
IOCBF5
MDSLR
Bit 5
—
—
—
Preliminary
MDOPOL
IOCBP4
IOCBN4
IOCBF4
BSR4
INTE
Bit 4
TO
—
—
—
CLKRDC<1:0>
IOCBP3
IOCBN3
IOCBF3
BSR3
IOCE
Bit 3
PD
—
TMR0IF
IOCBN2
IOCBP2
IOCBF2
BSR2
Bit 2
—
Z
MDMS<3:0>
MDCH<3:0>
MDCL<3:0>
CLKRDIV<2:0>
IOCBP1
IOCBN1
IOCBF1
 2011 Microchip Technology Inc.
BSR1
INTF
Bit 1
DC
—
IOCBP0
IOCBN0
IOCBF0
MDBIT
BSR0
IOCF
Bit 0
C
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0011 0000 0011 0000
0010 ---0 0010 ---0
x--- xxxx u--- uuuu
xxx- xxxx uuu- uuuu
xxx- xxxx uuu- uuuu
POR, BOR
Value on
—
—
—
—
—
—
—
—
—
—
—
—
Value on
all other
Resets
—
—
—
—
—
—
—
—
—
—
—
—