PIC16LF1847T-I/SO Microchip Technology, PIC16LF1847T-I/SO Datasheet - Page 39

• Manufacturer Part Number: PIC16LF1847T-I/SO
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ mTouch™ 16Fr

Specifications of PIC16LF1847T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (0.295", 7.50mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 3-8:
 2011 Microchip Technology Inc.
F80h
F81h
F82h
F83h
F84h
F85h
F86h
F87h
F88h
F89h
F8Ah
F8Bh
F8Ch
FE3h
FE4h
FE5h
FE6h
FE7h
FE8h
FE9h
FEAh
FEBh
FECh
FEDh
FEEh
FEFh
Legend:
Note
Address
Bank 31
—
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
1:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
—
—
STKPTR
TOSL
TOSH
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
STATUS_
PCLATH_
FSR0H_
FSR1H_
WREG_
FSR0L_
FSR1L_
These registers can be addressed from any bank.
Name
SHAD
SHAD
BSR_
SHAD
SHAD
SHAD
SHAD
SHAD
SHAD
Shaded locations are unimplemented, read as ‘0’.
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Working Register Shadow
Indirect Data Memory Address 0 Low Pointer Shadow
Indirect Data Memory Address 0 High Pointer Shadow
Indirect Data Memory Address 1 Low Pointer Shadow
Indirect Data Memory Address 1 High Pointer Shadow
Unimplemented
Top-of-Stack Low byte
Bit 7
GIE
—
—
—
—
—
—
—
—
Write Buffer for the upper 7 bits of the Program Counter
Program Counter Latch High Register Shadow
Top-of-Stack High byte
PEIE
Bit 6
—
—
—
—
—
TMR0IE
Bit 5
—
—
—
—
—
Preliminary
Bank Select Register Shadow
Current Stack pointer
BSR4
Bit 4
INTE
TO
—
BSR3
IOCE
Bit 3
PD
—
Z_SHAD
TMR0IF
BSR2
Bit 2
Z
PIC16(L)F1847
DC_SHAD
BSR1
Bit 1
INTF
DC
C_SHAD ---- -xxx ---- -uuu
BSR0
IOCF
Bit 0
C
DS41453B-page 39
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
0000 0000 uuuu uuuu
---x xxxx ---u uuuu
-xxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---1 1111 ---1 1111
xxxx xxxx uuuu uuuu
-xxx xxxx -uuu uuuu
POR, BOR
Value on
—
—
Value on
all other
Resets
—
—