PIC18F2221-E/SP Microchip Technology, PIC18F2221-E/SP Datasheet - Page 134

• Manufacturer Part Number: PIC18F2221-E/SP
• Description: 4KB, Flash, 512bytes-RAM, 25I/O, 8-bit Family,nanoWatt 28 SPDIP .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2221-E/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F2221/2321/4221/4321 FAMILY
13.1
Timer1 can operate in one of these modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>). When TMR1CS is cleared
(= 0), Timer1 increments on every internal instruction
FIGURE 13-1:
FIGURE 13-2:
DS39689F-page 134
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T1OSO/T13CKI
T1OSO/T13CKI
Timer1 Operation
T1OSI
T1OSI
Timer1 Oscillator
Timer1 Oscillator
T1OSCEN
T1OSCEN
TIMER1 BLOCK DIAGRAM
T1CKPS<1:0>
T1SYNC
TMR1ON
TIMER1 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
T1CKPS<1:0>
T1SYNC
TMR1ON
(1)
(1)
TMR1CS
TMR1CS
(CCP Special Event Trigger)
Clear TMR1
(CCP Special Event Trigger)
Clear TMR1
Clock
Clock
Internal
Internal
F
F
OSC
OSC
/4
/4
On/Off
1
0
1
0
Timer1 Clock Input
Timer1 Clock Input
Prescaler
Prescaler
cycle (Fosc/4). When the bit is set, Timer1 increments
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator, if enabled.
When Timer1 is enabled, the RC1/T1OSI and RC0/
T1OSO/T13CKI pins become inputs. This means the
values of TRISC<1:0> are ignored and the pins are
read as ‘0’.
1, 2, 4, 8
1, 2, 4, 8
2
2
TMR1L
TMR1L
8
Peripheral Clock
Synchronize
Peripheral Clock
8
Synchronize
Detect
Detect
High Byte
High Byte
TMR1H
TMR1
TMR1
8
© 2009 Microchip Technology Inc.
8
8
Internal Data Bus
1
0
1
0
Read TMR1L
Write TMR1L
Set
TMR1IF
on Overflow
Set
TMR1IF
on Overflow
Timer1
Timer1
On/Off
On/Off