PIC18F2221-E/SP Microchip Technology, PIC18F2221-E/SP Datasheet - Page 270

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PIC18F2221-E/SP

Manufacturer Part Number
PIC18F2221-E/SP
Description
4KB, Flash, 512bytes-RAM, 25I/O, 8-bit Family,nanoWatt 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2221-E/SP

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2221/2321/4221/4321 FAMILY
REGISTER 24-14: WDTCON: WATCHDOG TIMER CONTROL REGISTER
TABLE 24-2:
DS39689F-page 270
RCON
WDTCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
Note 1:
Name
The SBOREN bit is only available when the BOREN<1:0> Configuration bits = 01; otherwise, it is disabled
and reads as ‘0’. See Section 5.4 “Brown-out Reset (BOR)”.
bit 7-1
bit 0
IPEN
Bit 7
SUMMARY OF WATCHDOG TIMER REGISTERS
bit 7
Unimplemented: Read as ‘0’
SWDTEN: Software Controlled Watchdog Timer Enable bit
1 = Watchdog Timer is on
0 = Watchdog Timer is off
Legend:
R = Readable bit
U = Unimplemented bit, read as ‘0’
SBOREN
Note 1: This bit has no effect if the Configuration bit, WDTEN, is enabled.
U-0
Bit 6
(1)
U-0
Bit 5
U-0
Bit 4
RI
U-0
Bit 3
TO
W = Writable bit
-n = Value at POR
U-0
Bit 2
PD
(1)
U-0
Bit 1
POR
© 2009 Microchip Technology Inc.
SWDTEN
U-0
Bit 0
BOR
SWDTEN
R/W-0
on page
Values
Reset
56
56
bit 0
(1)

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