PIC18F25K80-E/SO Microchip Technology, PIC18F25K80-E/SO Datasheet - Page 400
![ECAN, 32KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 28 SOIC .300in TUBE](/photos/16/11/161109/soic-28_sml.jpg)
PIC18F25K80-E/SO
Manufacturer Part Number
PIC18F25K80-E/SO
Description
ECAN, 32KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F25K80-E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC18F25K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F66K80 FAMILY
EXAMPLE 27-1:
EXAMPLE 27-2:
DS39977C-page 400
WakeupInterrupt
NoInterrupt
ConfigWait:
; Save application required context.
; Poll interrupt flags and determine source of interrupt
; This was found to be CAN interrupt
; TempCANCON and TempCANSTAT are variables defined in Access Bank low
MOVFF
MOVFF
MOVF
ANDLW
ADDWF
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BCF
;
; User code to handle wake-up procedure
;
;
; Continue checking for other interrupt source or return from here
…
…
; Request Configuration mode.
MOVLW
MOVWF
; A request to switch to Configuration mode may not be immediately honored.
; Module will wait for CAN bus to be idle before switching to Configuration Mode.
; Request for other modes such as Loopback, Disable etc. may be honored immediately.
; It is always good practice to wait and verify before continuing.
MOVF
ANDLW
TSTFSZ WREG
BRA
; Module is in Configuration mode now.
; Modify configuration registers as required.
; Switch back to Normal mode to be able to communicate.
CANCON, TempCANCON
CANSTAT, TempCANSTAT
TempCANSTAT, W
B’00001110’
PCL, F
NoInterrupt
ErrorInterrupt
TXB2Interrupt
TXB1Interrupt
TXB0Interrupt
RXB1Interrupt
RXB0Interrupt
PIR3, WAKIF
B’10000000’
CANCON
CANSTAT, W
B’10000000’
ConfigWait
CHANGING TO CONFIGURATION MODE
WIN AND ICODE BITS USAGE IN INTERRUPT SERVICE ROUTINE TO ACCESS
TX/RX BUFFERS
Preliminary
; Save CANCON.WIN bits
; This is required to prevent CANCON
; from corrupting CAN buffer access
; in-progress while this interrupt
; occurred
; Save CANSTAT register
; This is required to make sure that
; we use same CANSTAT value rather
; than one changed by another CAN
; interrupt.
; Retrieve ICODE bits
; Perform computed GOTO
; to corresponding interrupt cause
; 000 = No interrupt
; 001 = Error interrupt
; 010 = TXB2 interrupt
; 011 = TXB1 interrupt
; 100 = TXB0 interrupt
; 101 = RXB1 interrupt
; 110 = RXB0 interrupt
; 111 = Wake-up on interrupt
; Clear the interrupt flag
; PC should never vector here. User may
; place a trap such as infinite loop or pin/port
; indication to catch this error.
; Set to Configuration Mode.
; Read current mode state.
; Interested in OPMODE bits only.
; Is it Configuration mode yet?
; No. Continue to wait...
2011 Microchip Technology Inc.
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