PIC18F27J53T-I/SO Microchip Technology, PIC18F27J53T-I/SO Datasheet - Page 545
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PIC18F27J53T-I/SO
Manufacturer Part Number
PIC18F27J53T-I/SO
Description
28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F27J53T-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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FIGURE 31-15:
TABLE 31-23: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
2010 Microchip Technology Inc.
70
70A
71
71A
72
72A
73
73A
74
75
76
77
80
81
82
83
Note 1:
Param
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SDIx
SSx
SCKx
SCKx
SDOx
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
SS
SS
SS
SC
SC
SC
SC
SS
SC
SC
SS
SC
SC
DO
DO
DI
DI
B
DO
DO
Symbol
2
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
V2
V2
L2
L2
L2
L2WB
H2
H2
L2
H2
L2
Refer to Figure 31-4 for load conditions.
H
L
H2
L2
B
R
F
V2
V2
DO
SC
SC
DO
SS
SC
SC
DI
DO
SS
DO
DI
SC
SC
L
H
L,
H,
L
H,
L
V
V
H,
V,
H,
L
Z
SSx to SCKx or SCKx Input
SSx to Write to SSPxBUF
SCKx Input High Time
(Slave mode)
SCKx Input Low Time
(Slave mode)
Setup Time of SDIx Data Input to SCKx Edge
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDIx Data Input to SCKx Edge
SDOx Data Output Rise Time
SDOx Data Output Fall Time
SSx to SDOx Output High-Impedance
SDOx Data Output Valid after SCKx Edge
SDOx Data Output Setup to SCKx Edge
SDOx Data Output Valid after SSx Edge
SSx after SCKx Edge
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
82
70
73
MSb In
MSb
74
71
75, 76
Characteristic
72
bit 6 - - - - - - 1
bit 6 - - - - 1
Preliminary
Continuous
Single byte
Continuous
Single byte
80
PIC18F47J53 FAMILY
LSb
LSb In
1.25 T
1.25 T
1.5 T
3 T
3 T
Min
100
T
CY
40
40
25
CY
35
10
—
—
—
—
—
CY
CY
CY
CY
CY
+ 40
+ 40
+ 30
+ 30
83
Max Units
100
70
50
77
—
—
—
—
—
—
—
—
—
—
25
25
50
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS39964B-page 545
(Note 1)
(Note 1)
(Note 2)
V
V
V
V
V
V
DD
DDCORE
DD
DD
DDCORE
DD
Conditions
= 3.3V,
= 2.15V
= 3.3V,
= 2.15V
= 2.5V
= 2.5V
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