PIC18F64J11T-I/PT Microchip Technology, PIC18F64J11T-I/PT Datasheet - Page 127

• Manufacturer Part Number: PIC18F64J11T-I/PT
• Description: 16KB, Flash, 1024bytes-RAM, 51I/O, 8-bit Family,nanoWatt 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F64J11T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18F64J11T-I/PTTR

10.5
The RCON register contains bits used to determine the
cause of the last Reset or wake-up from Idle or Sleep
modes. RCON also contains the bit that enables
interrupt priorities (IPEN).
REGISTER 10-13: RCON: RESET CONTROL REGISTER
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
IPEN
RCON Register
IPEN: Interrupt Priority Enable bit
1 = Enables priority levels on interrupts
0 = Disables priority levels on interrupts (PIC16CXXX Compatibility mode)
Unimplemented: Read as ‘0’
CM: Configuration Mismatch Flag bit
For details of bit operation, see Register 5-1.
RI: RESET Instruction Flag bit
For details of bit operation, see Register 5-1.
TO: Watchdog Timer Time-out Flag bit
For details of bit operation, see Register 5-1.
PD: Power-Down Detection Flag bit
For details of bit operation, see Register 5-1.
POR: Power-on Reset Status bit
For details of bit operation, see Register 5-1.
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 5-1.
U-0
—
W = Writable bit
‘1’ = Bit is set
R/W-1
CM
R/W-1
RI
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F85J11 FAMILY
R-1
TO
R-1
PD
x = Bit is unknown
R/W-0
POR
DS39774D-page 127
R/W-0
BOR
bit 0