PIC18F65K90T-I/PT Microchip Technology, PIC18F65K90T-I/PT Datasheet - Page 158
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PIC18F65K90T-I/PT
Manufacturer Part Number
PIC18F65K90T-I/PT
Description
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F66K90-IMR.pdf
(570 pages)
Specifications of PIC18F65K90T-I/PT
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Timers
8
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65K90T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
PIC18F65K90T-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
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PIC18F87K90 FAMILY
TABLE 11-1:
DS39957D-page 158
RA0/AN0/ULPWU
RA1/AN1/SEG18
RA2/AN2/V
RA3/AN3/V
RA4/T0CKI/
SEG14
RA5/AN4/SEG15/
T1CKI/T3G/
HLVDIN
OSC2/CLKO/RA6
OSC1/CLKI/RA7
Legend:
Pin Name
REF
REF
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
-
+
PORTA FUNCTIONS
Function
ULPWU
HLVDIN
SEG18
SEG14
SEG15
V
T0CKI
T1CKI
OSC2
CLKO
OSC1
V
CLKI
RA0
AN0
RA1
AN1
RA2
AN2
RA3
AN3
RA4
RA5
AN4
T3G
RA6
RA7
REF
REF
+
-
Setting
TRIS
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
x
1
0
1
1
1
x
x
1
x
x
0
1
x
x
0
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
TTL
I/O
ST
ST
ST
ST
LATA<0> data output; not affected by analog input.
PORTA<0> data input; disabled when analog input is enabled.
A/D Input Channel 0. Default input configuration on POR; does not
affect digital output.
Ultra Low-Power Wake-up (ULPWU) input.
LATA<1> data output; not affected by analog input.
PORTA<1> data input; disabled when analog input is enabled.
A/D Input Channel 1. Default input configuration on POR; does not
affect digital output.
LCD Segment 18 output; disables all other pin functions.
LATA<2> data output; not affected by analog input.
PORTA<2> data input; disabled when analog functions are enabled.
A/D Input Channel 2. Default input configuration on POR.
A/D and comparator low reference voltage input.
LATA<3> data output; not affected by analog input.
PORTA<3> data input; disabled when analog input is enabled.
A/D Input Channel 3. Default input configuration on POR.
A/D and comparator high reference voltage input.
LATA<4> data output.
PORTA<4> data input. Default configuration on POR.
Timer0 clock input.
LCD Segment 14 output; disables all other pin functions.
LATA<5> data output; not affected by analog input.
PORTA<5> data input; disabled when analog input is enabled.
A/D Input Channel 4. Default configuration on POR.
LCD Segment 15 output; disables all other pin functions.
Timer1 clock input.
Timer3 external clock gate input.
High/Low-Voltage Detect (HLVD) external trip point input.
Main oscillator feedback output connection (HS, XT and LP modes).
System cycle clock output (F
LATA<6> data output; disabled when OSC2 Configuration bit is set.
PORTA<6> data input; disabled when OSC2 Configuration bit is set.
Main oscillator input connection (HS, XT and LP modes).
Main external clock source input (EC modes).
LATA<7> data output; disabled when OSC2 Configuration bit is set.
PORTA<7> data input; disabled when OSC2 Configuration bit is set.
Description
OSC
2009-2011 Microchip Technology Inc.
/4, EC and INTOSC modes).
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