PIC18F65K90T-I/PT Microchip Technology, PIC18F65K90T-I/PT Datasheet - Page 377

32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 TQFP 10x10x1mm T/R

PIC18F65K90T-I/PT

Manufacturer Part Number
PIC18F65K90T-I/PT
Description
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F65K90T-I/PT

Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Timers
8
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
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Quantity
Price
Part Number:
PIC18F65K90T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F65K90T-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
23.2.2
The ADRESH:ADRESL register pair is where the 12-bit
A/D result and extended sign bits (ADSGN) are loaded
at the completion of a conversion. This register pair is
16 bits wide. The A/D module gives the flexibility of left
or right justifying the 12-bit result in the 16-Bit Result
register. The A/D Format Select bit (ADFM) controls
this justification.
Figure 23-3
justification and location of the sign bit (ADSGN). The
extended sign bits allow for easier 16-bit math to be
FIGURE 23-3:
 2009-2011 Microchip Technology Inc.
0xFFF0
0xFFE0
0x0020
0x0010
0x0000
0xFFFF
0xFFEF
0x001F
0x000F
A/D RESULT REGISTERS
shows the operation of the A/D result
Result bits
Hex
Left Justified
ADFM = 0
A/D RESULT JUSTIFICATION
ADRESH
Left Justified
Two’s Complement Example Results Number Line
ADSGN bit
Decimal
-4095
-4096
4095
4094
ADRESL
-1
-2
2
1
0
12-Bit Result
0x0FFF
0x0FFE
0x0002
0x0001
0x0000
0xFFFF
0xFFFE
0xF001
0xF000
PIC18F87K90 FAMILY
performed on the result. The results are represented as
a two's compliment binary value. This means that when
sign bits and magnitude bits are considered together in
right justification, the ADRESH and ADRESL can be
read as a single signed integer value.
When the A/D Converter is disabled, these 8-bit registers
can be used as two general purpose registers.
Hex
ADRESH
Right Justified
ADRESL
Right Justified
ADFM = 1
Decimal
-4095
-4096
4095
4094
-1
-2
2
1
0
DS39957D-page 377

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