PIC24F16KA101T-I/SS Microchip Technology, PIC24F16KA101T-I/SS Datasheet - Page 2
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PIC24F16KA101T-I/SS
Manufacturer Part Number
PIC24F16KA101T-I/SS
Description
16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 16 I/O,16-bit PIC24F Family, NanoWatt
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.MA240017.pdf
(254 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F16KA101-ISS.pdf
(18 pages)
Specifications of PIC24F16KA101T-I/SS
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24F16KA101T-I/SS
Manufacturer:
MICROCHIR
Quantity:
20 000
PIC24F16KA102 FAMILY
TABLE 2:
DS80473F-page 2
CTMU
Resets
Core
Core
Memory
Comparator
SPI
I/O Ports
I/O Ports
Core
Comparator
Comparator
Core
Note 1:
Module
Only those issues indicated in the last column apply to the current silicon revision.
BOR
ICSP™
Deep Sleep
Code
Protection
Enhanced
Buffer mode
PORTA and
PORTB
PORTA and
PORTB
Low-Voltage
BOR
I/O Pins
Doze mode
SILICON ISSUE SUMMARY
Feature
—
—
—
Number
Item
10.
12.
13.
11.
1.
2.
3.
4.
5.
6.
7.
8.
9.
Module operates in Sleep mode.
Inadvertent Reset when disabling/enabling
BOR.
conditions.
Failure to avoid Deep Sleep entry.
No direct jump to Boot Sector from
Reset Vector.
Errors when polling SPITBF flag.
Under certain conditions, functionality for
RB0 and RA0 pins do not work correctly.
Under certain conditions, functionality for
RB2 does not work correctly.
LPBOR configuration results in ambiguous
Resets.
some digital I/O ports.
Output polarity inversion also inverts
edge-detect sensing.
Instruction execution glitches following
DOZE bit changes.
Unable to use PGC/PGD pair under certain
Change in maximum V
Enabling comparator outputs disables
Issue Summary
IOFF
.
2010 Microchip Technology Inc.
A5
X
X
X
X
X
X
X
X
X
X
X
X
X
Affected Revisions
A6
X
X
X
X
X
X
X
X
X
X
X
A7
X
X
X
X
X
X
X
X
X
X
X
(1)
B0
X
X
X
X