PIC24FJ32GA104-I/PT Microchip Technology, PIC24FJ32GA104-I/PT Datasheet - Page 183
![16-bit, 16 MIPS, 32KB Flash, 8KB RAM, Nanowatt XLP 44 TQFP 10x10x1mm TRAY](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC24FJ32GA104-I/PT
Manufacturer Part Number
PIC24FJ32GA104-I/PT
Description
16-bit, 16 MIPS, 32KB Flash, 8KB RAM, Nanowatt XLP 44 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24FJ32GA102-ISP.pdf
(308 pages)
2.PIC24FJ32GA102-ISP.pdf
(12 pages)
3.PIC24FJ32GA102-ISP.pdf
(48 pages)
Specifications of PIC24FJ32GA104-I/PT
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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- PIC24FJ32GA102-ISP PDF datasheet
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- PIC24FJ32GA102-ISP PDF datasheet #3
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17.0
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules available
in the PIC24F device family. The UART is a full-duplex,
asynchronous system that can communicate with
peripheral devices, such as personal computers,
LIN/J2602, RS-232 and RS-485 interfaces. The module
also supports a hardware flow control option with the
UxCTS and UxRTS pins, and also includes an IrDA
encoder and decoder.
The primary features of the UART module are:
• Full-Duplex, 8 or 9-Bit Data Transmission through
• Even, Odd or No Parity Options (for 8-bit data)
• One or Two Stop bits
• Hardware Flow Control Option with UxCTS and
FIGURE 17-1:
2010 Microchip Technology Inc.
Note:
the UxTX and UxRX pins
UxRTS pins
Note:
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
Section 21. “UART” (DS39708).
The UART inputs and outputs must all be assigned to available RPn pins before use. Please see
Section 10.4 “Peripheral Pin Select (PPS)” for more information.
Family
UART SIMPLIFIED BLOCK DIAGRAM
Hardware Flow Control
Baud Rate Generator
UARTx Transmitter
UARTx Receiver
Reference
IrDA
®
Manual”,
PIC24FJ64GA104 FAMILY
®
• Fully Integrated Baud Rate Generator with 16-Bit
• Baud Rates Ranging from 1 Mbps to 15 bps at
• 4-Deep, First-In-First-Out (FIFO) Transmit Data
• 4-Deep FIFO Receive Data Buffer
• Parity, Framing and Buffer Overrun Error Detection
• Support for 9-Bit mode with Address Detect
• Transmit and Receive Interrupts
• Loopback mode for Diagnostic Support
• Support for Sync and Break Characters
• Supports Automatic Baud Rate Detection
• IrDA Encoder and Decoder Logic
• 16x Baud Clock Output for IrDA Support
A simplified block diagram of the UART is shown in
Figure 17-1. The UART module consists of these key
important hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
Prescaler
16 MIPS
Buffer
(9th bit = 1)
UxRTS/BCLKx
UxCTS
UxRX
UxTX
DS39951C-page 183
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