PIC24FJ32GA104-I/PT Microchip Technology, PIC24FJ32GA104-I/PT Datasheet - Page 226

16-bit, 16 MIPS, 32KB Flash, 8KB RAM, Nanowatt XLP 44 TQFP 10x10x1mm TRAY

PIC24FJ32GA104-I/PT

Manufacturer Part Number
PIC24FJ32GA104-I/PT
Description
16-bit, 16 MIPS, 32KB Flash, 8KB RAM, Nanowatt XLP 44 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24FJ32GA104-I/PT

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ32GA104-I/PT
Manufacturer:
Microchip
Quantity:
567
Part Number:
PIC24FJ32GA104-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24FJ32GA104-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC24FJ64GA104 FAMILY
REGISTER 21-6:
DS39951C-page 226
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-0
Note 1:
CSSL15
CSSL7
R/W-0
R/W-0
Analog channels, AN6, AN7, AN8 and AN12, are unavailable on 28-pin devices; leave these corresponding
bits cleared.
CSSL15: A/D Input Band Gap Scan Enable bit
1 = Internal band gap (V
0 = Analog channel is disabled from input scan
CSSL14: A/D Input Half Band Gap Scan Enable bit
1 = Internal half band gap (V
0 = Analog channel is disabled from input scan
CSSL13: A/D Input Voltage Regulator Output Scan Enable bit
1 = Internal voltage regulator output (V
0 = Analog channel is disabled from input scan
CSSL<12:0>: A/D Input Pin Scan Selection bits
1 = Corresponding analog channel is selected for input scan
0 = Analog channel is omitted from input scan
CSSL14
CSSL6
R/W-0
R/W-0
AD1CSSL: A/D INPUT SCAN SELECT REGISTER
W = Writable bit
‘1’ = Bit is set
CSSL13
CSSL5
R/W-0
R/W-0
BG
) channel is enabled for input scan
BG
/2) channel is enabled for input scan
R/W-0
CSSL12
CSSL4
R/W-0
(1)
DDCORE
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CSSL11
) is enabled for input scan
CSSL3
R/W-0
R/W-0
(1)
CSSL10
CSSL2
R/W-0
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
CSSL9
CSSL1
R/W-0
R/W-0
CSSL8
CSSL0
R/W-0
R/W-0
bit 8
bit 0
(1)

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