PIC24HJ32GP202-E/MM Microchip Technology, PIC24HJ32GP202-E/MM Datasheet - Page 106

16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE

PIC24HJ32GP202-E/MM

Manufacturer Part Number
PIC24HJ32GP202-E/MM
Description
16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ32GP202-E/MM

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC24HJ32GP202/204 AND PIC24HJ16GP304
TABLE 10-1:
10.6.2.2
In contrast to inputs, the outputs of the peripheral pin
select options are mapped on the basis of the pin. In
this case, a control register associated with a particular
pin dictates the peripheral output to be mapped. The
RPORx registers are used to control output mapping.
Like the RPINRx registers, each register contains sets
of 5-bit fields, with each set associated with one RPn
pin (see
value of the bit field corresponds to one of the periph-
erals, and that peripheral’s output is mapped to the pin
(see
The list of peripherals for output mapping also includes
a null value of ‘00000’
technique. This permits any given pin to remain
unconnected from the output of any of the pin
selectable peripherals.
DS70289G-page 106
External Interrupt 1
External Interrupt 2
Timer 2 External Clock
Timer 3 External Clock
Input Capture 1
Input Capture 2
Input Capture 7
Input Capture 8
Output Compare Fault A
UART 1 Receive
UART 1 Clear To Send
SPI 1 Data Input
SPI 1 Clock Input
SPI 1 Slave Select Input
Note 1:
Table 10-2
Register 10-10
Unless otherwise noted, all inputs use the Schmitt input buffers.
Output Mapping
and
Input Name
REMAPPABLE PERIPHERAL INPUTS
Figure
through
10-3).
because of the mapping
Register
10-22). The
Function Name
SCK1IN
U1CTS
SS1IN
OCFA
U1RX
T2CK
T3CK
SDI1
INT1
INT2
IC1
IC2
IC7
IC8
(1)
FIGURE 10-3:
U1RTS Output Enable 4
U1TX Output Enable
OC1 Output Enable
OC2 Output Enable
RPINR10
RPINR10
RPINR18
RPINR11
RPINR18
RPINR20
RPINR20
RPINR21
Register
U1RTS Output 4
RPINR0
RPINR1
RPINR3
RPINR3
RPINR7
RPINR7
U1TX Output
OC1 Output
OC2 Output
Default
Default
RPnR<4:0>
MULTIPLEXING OF
REMAPPABLE OUTPUT
FOR RPn
© 2011 Microchip Technology Inc.
18
18
19
19
0
0
3
3
Output Enable
Output Data
Configuration
U1CTSR<4:0>
OCFAR<4:0>
U1RXR<4:0>
SCK1R<4:0>
T2CKR<4:0>
T3CKR<4:0>
INT1R<4:0>
INT2R<4:0>
SDI1R<4:0>
SS1R<4:0>
IC1R<4:0>
IC2R<4:0>
IC7R<4:0>
IC8R<4:0>
Bits
RPn

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