PIC32MX664F128H-I/MR Microchip Technology, PIC32MX664F128H-I/MR Datasheet - Page 131

• Manufacturer Part Number: PIC32MX664F128H-I/MR
• Description: 64 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, Ethernet, 4 DMA 64 QFN 9x9x0.9mm TU
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX664F128H-I/MR

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: Ethernet, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Processor Series: PIC32MX5x
• Core: MIPS32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

13.0
FIGURE 13-1:
© 2010 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
SOSCO/T1CK
Note 1: The default state of the SOSCEN (OSCCON<1>) during a device Reset is controlled by the FSOSCEN bit in
2: Some registers and associated bits
TIMER1
SOSCI
T1IF
Event Flag
Configuration Word, DEVCFG1.
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 14. “Timers”
(DS61105)
Reference Manual” , which is available
from
(www.microchip.com/PIC32).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
TGATE (T1CON<7>)
the
TIMER1 BLOCK DIAGRAM
0
1
in
Microchip
the
Reset
Equal
SOSCEN
“PIC32
16-bit Comparator
web
TMR1
PR1
Family
site
in
PBCLK
Q
Q
(1)
Sync
Gate
D
This
synchronous/asynchronous 16-bit timer that can operate
as a free-running interval timer for various timing applica-
tions and counting external events. This timer can also
be used with the Low-Power Secondary Oscillator
(S
following modes are supported:
• Synchronous Internal Timer
• Synchronous Internal Gated Timer
• Synchronous External Timer
• Asynchronous External Timer
13.1
• Selectable clock prescaler
• Timer operation during CPU Idle and Sleep mode
• Fast bit manipulation using CLR, SET and INV
• Asynchronous mode can be used with the S
PIC32MX5XX/6XX/7XX
OSC
registers
to function as a Real-Time Clock (RTC)
) for Real-Time Clock (RTC) applications. The
family
Additional Supported Features
1 0
x 1
0 0
of
TSYNC (T1CON<2>)
PIC32
TGATE (T1CON<7>)
TCS (T1CON<1>)
ON (T1CON<15>)
0
1
devices
(T1CON<5:4>)
TCKPS<1:0>
1, 8, 64, 256
Prescaler
Sync
DS61156F-page 131
2
features
OSC
one