PIC32MX664F128H-I/MR Microchip Technology, PIC32MX664F128H-I/MR Datasheet - Page 166

64 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, Ethernet, 4 DMA 64 QFN 9x9x0.9mm TU

PIC32MX664F128H-I/MR

Manufacturer Part Number
PIC32MX664F128H-I/MR
Description
64 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, Ethernet, 4 DMA 64 QFN 9x9x0.9mm TU
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet

Specifications of PIC32MX664F128H-I/MR

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Processor Series
PIC32MX5x
Core
MIPS32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC32MX5XX/6XX/7XX
REGISTER 28-3:
DS61156F-page 166
bit 31
bit 23
bit 15
bit 7
Legend:
R = Readable bit
U = Unimplemented bit
bit 31-19
bit 18-16
bit 15
bit 14-11
bit 10-8
bit 7
UPLLEN
R/P
r-1
r-1
r-1
Reserved: Write ‘ 1 ’
FPLLODIV<2:0>: Default Postscaler for PLL bits
111 = PLL output divided by 256
110 = PLL output divided by 64
101 = PLL output divided by 32
100 = PLL output divided by 16
011 = PLL output divided by 8
010 = PLL output divided by 4
001 = PLL output divided by 2
000 = PLL output divided by 1
UPLLEN: USB PLL Enable bit
1 = Disable and bypass USB PLL
0 = Enable USB PLL
Reserved: Write ‘ 1 ’
UPLLIDIV<2:0>: PLL Input Divider bits
111 = 12x divider
110 = 10x divider
101 = 6x divider
100 = 5x divider
011 = 4x divider
010 = 3x divider
010 = 3x divider
001 = 2x divider
000 = 1x divider
Reserved: Write ‘ 1 ’
R/P-1
r-1
r-1
r-1
DEVCFG2: DEVICE CONFIGURATION WORD 2
FPLLMUL<2:0>
W = Writable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
R/P
r-1
r-1
r-1
R/P-1
r-1
r-1
r-1
P = Programmable bit
r-1
r-1
r-1
r-1
R/P
R/P
R/P
r-1
© 2010 Microchip Technology Inc.
FPLLODIV<2:0>
UPLLIDIV<2:0>
FPLLIDIV<2:0>
r = Reserved bit
R/P
R/P
R/P
r-1
R/P
R/P
R/P
r-1
bit 24
bit 16
bit 8
bit 0

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