PIC32MX664F128H-I/MR Microchip Technology, PIC32MX664F128H-I/MR Datasheet - Page 242

• Manufacturer Part Number: PIC32MX664F128H-I/MR
• Description: 64 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, Ethernet, 4 DMA 64 QFN 9x9x0.9mm TU
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX664F128H-I/MR

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: Ethernet, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Processor Series: PIC32MX5x
• Core: MIPS32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC32MX5XX/6XX/7XX
Revision C (February 2010)
The revision includes the following updates, as
described in
TABLE B-2:
DS61156F-page 242
“High-Performance, USB, CAN
and Ethernet 32-bit Flash
Microcontrollers”
1.0 “Device Overview”
4.0 “Memory Organization”
28.0 “Special Features”
Appendix A: “Migrating from
PIC32MX3XX/4XX to
PIC32MX5XX/6XX/7XX
Devices”
Section Name
Table
MAJOR SECTION UPDATES
B-2:
Added the following devices:
• PIC32MX675F256H
• PIC32MX775F256H
• PIC32MX775F512H
• PIC32MX675F256L
• PIC32MX775F256L
• PIC32MX775F512L
Added the following pins:
• EREFCLK
• ECRSDV
• AEREFCLK
• AECRSDV
Added the EREFCLK and ECRSDV pins to
Updated the pin number pinout I/O descriptions for the following pin names in
Table
Added the following pins to the Pinout I/O Descriptions table
• EREFCLK
• ECRSDV
• AEREFCLK
• AECRSDV
Added new devices and updated the virtual and physical memory map values in
Figure
Added new devices to
Added new devices to the following register maps:
•
•
•
•
•
•
•
•
Changed the bits named POSCMD to POSCMOD in
Configuration Word Summary).
Changed all references of POSCMD to POSCMOD in the Device Configuration
Word 1 register (see
Added the new section
• SCL3
• SDA3
• SCL2
• SDA2
• SCL4
• SDA4
Table
Table 4-12
Table 4-15
Table 4-24
Table 4-36
Table 4-45
Table 4-46
Table 4-47
1-1:
4-4.
4-3,
Table
(I2C2 Register Map)
(SPI1 Register Map)
through
and
(CAN1 Register Map)
(CAN2 Register Map)
(Ethernet Controller Register Map)
Table 4-37
• SCL5
• SDA5
• TMS
• TCK
• TDI
• TDO
4-4,
Register
Table 4-35
Figure
Table 4-6
Appendix
(Change Notice and Pull-up Register Maps)
4-5.
Update Description
28-2).
(PORTA-PORTG Register Maps)
and
.
• RTCC
• CV
• CV
• CV
• C1IN-
• C1IN+
Table 4-7
REF
REF
REFOUT
Table 5
-
+
(Interrupt Register Maps)
© 2010 Microchip Technology Inc.
and
Table 4-42
• C1OUT
• C2IN-
• C2IN+
• C2OUT
• PMA0
• PMA1
Table
(Table
6.
(Device
1-1):