XR17D154IV Exar Corporation, XR17D154IV Datasheet - Page 68

• Manufacturer Part Number: XR17D154IV
• Description: Universal QUART W/ PCI Bus Interface.
• Manufacturer: Exar Corporation

Specifications of XR17D154IV

• Features: *
• Number Of Channels: 4, QUART
• Fifo's: 64 Byte
• Protocol: RS485
• Voltage - Supply: 3.3V, 5V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS Compliant

XR17D154
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
6.0 PROGRAMMING EXAMPLES .............................................................................................................52
ABSOLUTE MAXIMUM RATINGS...................................................................................53
ELECTRICAL CHARACTERISTICS ................................................................................53
DC ELECTRICAL CHARACTERISTICS FOR 5V PCI B
53
AC ELECTRICAL CHARACTERISTICS FOR 5V PCI B
54
DC ELECTRICAL CHARACTERISTICS FOR 3.3V PCI B
AC ELECTRICAL CHARACTERISTICS FOR 3.3V PCI B
5.3 RECEIVER ...................................................................................................................................................... 30
5.4 AUTOMATIC HARDWARE (RTS/CTS OR DTR/DSR) FLOW CONTROL OPERATION .............................. 31
5.5 INFRARED MODE .......................................................................................................................................... 33
5.6 INTERNAL LOOPBACK ................................................................................................................................. 34
5.7 UART CHANNEL CONFIGURATION REGISTERS AND ADDRESS DECODING ....................................... 34
5.8 REGISTERS .................................................................................................................................................... 37
IER versus Receive FIFO Interrupt Mode Operation................................................................................................. 37
IER versus Receive/Transmit FIFO Polled Mode Operation ..................................................................................... 37
6.1
F
F
F
F
T
F
F
F
T
T
T
T
T
T
T
T
T
F
F
F
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
5.2.1 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY......................................................................................... 28
5.2.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................. 28
5.2.3 TRANSMITTER OPERATION IN FIFO MODE ........................................................................................................... 29
5.2.4 AUTO RS485 OPERATION ........................................................................................................................................ 29
5.3.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................ 30
5.3.2
5.3.3 RECEIVER OPERATION WITH FIFO ......................................................................................................................... 31
5.8.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................ 37
5.8.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY......................................................................................... 37
5.8.3 BAUD RATE GENERATOR DIVISORS (DLL AND DLM) - READ/WRITE................................................................ 37
5.8.4 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE .......................................................................................... 37
5.8.5 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY............................................................................................ 38
5.8.6 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY .................................................................................................. 40
5.8.7 LINE CONTROL REGISTER (LCR) - READ/WRITE .................................................................................................. 42
5.8.8 MODEM CONTROL REGISTER (MCR) - READ/WRITE ........................................................................................... 43
5.8.9 LINE STATUS REGISTER (LSR) - READ/ONLY ....................................................................................................... 44
5.8.10 MODEM STATUS REGISTER (MSR) - READ-ONLY .............................................................................................. 45
5.8.11 MODEM STATUS REGISTER (MSR) - WRITE-ONLY ............................................................................................. 46
5.8.12 SCRATCH PAD REGISTER (SPR) - READ/WRITE................................................................................................. 47
5.8.13
5.8.14 ENHANCED FEATURE REGISTER (EFR) - READ/WRITE..................................................................................... 48
5.8.15 TXCNT[7:0]: TRANSMIT FIFO LEVEL COUNTER - READ-ONLY ......................................................................... 50
5.8.16 TXTRG [7:0]: TRANSMIT FIFO TRIGGER LEVEL - WRITE-ONLY ........................................................................ 50
5.8.17 RXCNT[7:0]: RECEIVE FIFO LEVEL COUNTER - READ-ONLY ............................................................................ 50
5.8.18 RXTRG[7:0]: RECEIVE FIFO TRIGGER LEVEL - WRITE-ONLY............................................................................ 50
UNLOADING RECEIVE DATA USING THE SPECIAL RECEIVE FIFO DATA WITH STATUS .................. 52
11: A
12: UART CHANNEL CONFIGURATION REGISTERS ................................................................................................... 35
13: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION. S
14: I
15: T
16: P
17: A
18: 16 S
19: S
20: UART RESET CONDITIONS ...................................................................................................................................... 51
12. T
13. T
14. R
15. R
16. A
17. I
18. I
19. T
20. PCI B
21. D
RECEIVER OPERATION IN NON-FIFO MODE ........................................................................................................ 30
NTERRUPT
FEATURE CONTROL REGISTER (FCTR) - READ/WRITE .................................................................................... 47
RANSMIT AND
UTO
ARITY SELECTION
UTO
OFTWARE
NFRARED
NTERNAL
RANSMITTER
RANSMIITTER
IMING
UTO
ECEIVER
ECEIVER
EVICE
ELECTABLE
RTS/CTS
RS485 H
RTS/DTR
US
F
C
OR
C
ONFIGURATION AND
L
T
S
F
O
O
ONFIGURATION
OOP
RANSMIT
OURCE AND
LOW
PERATION IN NON
PERATION IN
E
R
XTERNAL
O
ALF
O
H
OR
ECEIVE
PERATION IN NON
B
PERATION IN
YSTERESIS
C
AND
ACK
........................................................................................................................................................ 43
-
ONTROL
DUPLEX
DTR/DSR F
D
CTS/DSR F
................................................................................................................................................. 34
ATA
FIFO T
C
P
LOCK
FIFO
RIORITY
S
E
D
F
PACE
L
NCODING AND
UNCTIONS
IRECTION
-FIFO M
EVELS
UART R
FIFO
RIGGER
I
AND
NPUT AT
LOW
-FIFO M
R
L
LOW
EVEL
EGISTERS
AND
F
W
C
LOW
EGISTERS
ODE
C
ONTROL
HEN
........................................................................................................................ 49
L
C
F
EVEL
ONTROL
XTAL1 P
..................................................................................................................... 39
ONTROL
LOW
ODE
C
.................................................................................................................. 30
R
T
ONTROL
ECEIVE
RIGGER
R
S
............................................................................................................ 29
C
S
ELECTION
EAD AND
ONTROL
R
ELECTION
D
O
IN
EAD
ELAY FROM
II
PERATION
.................................................................................................... 57
D
M
T
ATA
ABLE
ODE
O
US
US
W
PERATION FOR A
M
............................................................................................ 41
US
US
D
.......................................................................................... 31
RITE OPERATION
ODE
-D
I
......................................................................................... 31
I
ECODING
NTERFACE
NTERFACE
...................................................................................... 32
I
I
T
IS
NTERFACE
NTERFACE
................................................................................... 29
RANSMIT
S
ELECTED
.......................................................................... 33
HADED BITS ARE ENABLED BY
-
TO
(VIO = 4.75-5.25V, VCC = 4.5-5.5V)
(VIO = 4.75-5.25V, VCC = 4.5-5.5V)
B
................................................................. 58
YTE OR
-R
................................................................ 48
(VIO = 3.0-3.6V, VCC = 3.0-5.5V)56
(VIO = 3.0-3.6V, VCC = 3.0-5.5V)54
ECEIVE
DWORD ...................................... 59
................................................. 46
xr
EFR B
IT
-4. ....... 36
REV. 1.2.2