SC16C850SVIBS-S NXP Semiconductors, SC16C850SVIBS-S Datasheet - Page 22
SC16C850SVIBS-S
Manufacturer Part Number
SC16C850SVIBS-S
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SC16C850SVIBS-S.pdf
(49 pages)
Specifications of SC16C850SVIBS-S
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Philips Semiconductors
9397 750 11618
Product data
7.1 Receiver holding register (RHR)
7.2 Transmit holding register (THR)
Remark: Refer to the notes under
The receiver section consists of the receiver holding register (RHR) and the receiver
shift register (RSR). The RHR is actually a 64-byte FIFO. The RSR receives serial
data from the RX terminal. The data is converted to parallel data and moved to the
RHR. The receiver section is controlled by the line control register. If the FIFO is
disabled, location zero of the FIFO is used to store the characters.
Remark: In this case, characters are overwritten if overflow occurs.
If overflow occurs, characters are lost. The RHR also stores the error status bits
associated with each character.
The transmitter section consists of the transmit holding register (THR) and the
transmit shift register (TSR). The THR is actually a 64-byte FIFO. The THR receives
data and shifts it into the TSR, where it is converted to serial data and moved out on
the TX terminal. If the FIFO is disabled, the FIFO is still used to store the byte.
Characters are lost if overflow occurs.
Rev. 04 — 19 June 2003
Table 9
for more register access information.
Quad UART with 64-byte FIFO
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
SC16C754
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