SC16C2550BIBS-S NXP Semiconductors, SC16C2550BIBS-S Datasheet - Page 41
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SC16C2550BIBS-S
Manufacturer Part Number
SC16C2550BIBS-S
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SC16C2550BIBS-S.pdf
(43 pages)
Specifications of SC16C2550BIBS-S
Transmit Fifo
16Byte
Receive Fifo
16Byte
Transmitter And Receiver Fifo Counter
Yes
Data Rate
5Mbps
Operating Supply Voltage (max)
5.5V
Mounting
Surface Mount
Pin Count
32
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Number Of Channels
2
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
15. Revision history
Table 30.
SC16C2550B_5
Product data sheet
Document ID
SC16C2550B_5
Modifications:
SC16C2550B_4
SC16C2550B_3
SC16C2550B-02
(9397 750 14449)
SC16C2550B-01
(9397 750 11982)
Revision history
Release date
20090112
20070215
20050926
20041214
20050719
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•
•
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Section 2
only pins” and added
Figure 7 “Internal Loopback mode
– at signals coming out of ‘modem control logic’ block, changed from “OP1A, OP2B” to
Table 23 “Limiting
– symbol V
Table 24 “Static
– changed symbol/parameter from “V
– changed symbol/parameter from “V
– changed symbol/parameter from “I
Table 25 “Dynamic
updated soldering information
“OP1A, OP1B”
LOW-level input voltage”
HIGH-level input voltage”
“Features”: 3
n
split to show 2 separate conditions: “at D7 to D0 pins” and “at input only pins”
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product data
Product data
characteristics”:
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
values”:
characteristics”: added
Rev. 05 — 12 January 2009
Footnote
rd
bullet item changed from “5 V tolerant inputs” to “5 V tolerant on input
1.
diagram”:
CL
IL(CK)
IH(CK)
, clock leakage” to “I
Table note [4]
, LOW-level clock input voltage” to “V
, HIGH-level clock input voltage” to “V
Change notice
-
-
-
-
-
and its reference at t
L(clk)
, clock leakage current”
SC16C2550B
Supersedes
SC16C2550B_4
SC16C2550B_3
SC16C2550B-02
SC16C2550B-01
-
© NXP B.V. 2009. All rights reserved.
RESET
IL(clk)
IH(clk)
, clock
, clock
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