ISP1506ABS,518 NXP Semiconductors, ISP1506ABS,518 Datasheet - Page 52

RF Transceiver USB ULPI TRNSCVR

ISP1506ABS,518

Manufacturer Part Number
ISP1506ABS,518
Description
RF Transceiver USB ULPI TRNSCVR
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1506ABS,518

Number Of Transceivers
1
Esd Protection
YeskV
Operating Supply Voltage (typ)
Not RequiredV
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
Not RequiredV
Operating Supply Voltage (min)
Not RequiredV
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Supply Voltage
1.65 V to 3.6 V
Mounting Style
SMD/SMT
Package / Case
HVQFN-24
Lead Free Status / RoHS Status
Compliant
Other names
935278332518 ISP1506ABS-T
NXP Semiconductors
Table 38.
Table 39.
Table 40.
Table 41.
ISP1506A_ISP1506B_2
Product data sheet
Bit
Symbol
Reset
Access
Bit
7 to 2
1
0
Bit
7 to 0
Bit
Symbol
Reset
Access
Symbol
SCRATCH[7:0]
Debug register (address R = 15h) bit allocation
Debug register (address R = 15h) bit description
Scratch register (address R = 16h to 18h, W = 16h, S = 17h, C = 18h) bit description
Power Control register (address R = 3Dh to 3Fh, W = 3Dh, S = 3Eh, C = 3Fh) bit allocation
10.1.10 Scratch register
10.1.11 Reserved
10.1.12 Access extended register set
10.1.13 Vendor-specific registers
10.1.14 Power Control register
10.1.9 Debug register
R/W/S/C
Symbol
-
LINESTATE1
LINESTATE0
R
7
0
7
0
The bit allocation of the Debug register is given in
current value of signals useful for debugging.
Table 40
purposes.
Registers 19h to 2Eh are not implemented. Operating on these addresses will have no
effect on the PHY.
Address 2Fh does not contain register data. Instead it links to the extended register set.
The immediate register set maps to the lower end of the extended register set.
Addresses 30h to 3Fh contain vendor-specific registers.
This register controls various aspects of the ISP1506.
the register.
Access
R/W/S/C
R/W/S/C
R
6
0
6
0
shows the bit description of the Scratch register. It is an empty register for testing
reserved
Description
reserved
Line State 1: Contains the current value of LINESTATE 1
Line State 0: Contains the current value of LINESTATE 0
Value
00h
R/W/S/C
R
5
0
5
0
Rev. 02 — 28 August 2008
reserved
Description
Scratch: This is an empty register byte for testing purposes. Software
can read, write, set and clear this register, and the functionality of the
PHY will not be affected.
R/W/S/C
R
4
0
4
0
BVALID_
R/W/S/C
FALL
R
3
0
3
0
ISP1506A; ISP1506B
Table
Table 41
BVALID_
R/W/S/C
RISE
38. This register indicates the
ULPI HS USB OTG transceiver
R
2
0
2
0
shows the bit allocation of
reserved
R/W/S/C
STATE1
LINE
R
1
0
1
0
© NXP B.V. 2008. All rights reserved.
IGNORE_
R/W/S/C
STATE0
RESET
LINE
R
0
0
0
0
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