SAF7118EH/V1/G-T NXP Semiconductors, SAF7118EH/V1/G-T Datasheet - Page 48
SAF7118EH/V1/G-T
Manufacturer Part Number
SAF7118EH/V1/G-T
Description
Video ICs 9BIT VIDEO DECODER
Manufacturer
NXP Semiconductors
Datasheet
1.SAF7118EHV1G-T.pdf
(175 pages)
Specifications of SAF7118EH/V1/G-T
Screening Level
Industrial
Package Type
HBGA
Pin Count
156
Lead Free Status / RoHS Status
Compliant
Other names
SAF7118EH/V1/G,518
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NXP Semiconductors
SAF7118_4
Product data sheet
8.4.1.3 Output field processing
As a reference for the output field processing, two signals are available for the back-end
hardware.
These signals are the input field ID from the scaler source and a TOGGLE flag, which
shows that an active task is used an odd (1, 3, 5...) or even (2, 4, 6...) number of times.
Using a single or both tasks and reducing the field or frame rate with the task handling
function, the TOGGLE information can be used to reconstruct an interlaced scaled picture
at a reduced frame rate. The TOGGLE flag isn’t synchronized to the input field detection,
as it is only dependent on the interpretation of this information by the external hardware,
whether the output of the scaler is processed correctly; see
With OFIDC = 0, the scalers input field ID is available as output field ID on bit D6 of SAV
and EAV, respectively on pin IGP0 (IGP1), if FID output is selected.
When OFIDC[90h[6]] = 1, the TOGGLE information is available as output field ID on bit D6
of SAV and EAV, respectively on pin IGP0 (IGP1), if FID output is selected.
Additionally the bit D7 of SAV and EAV can be defined via CONLH[90h[7]].
CONLH[90h[7]] = 0 (default) sets D7 to logic 1, a logic 1 inverts the SAV/EAV bit D7. So it
is possible to mark the output of both tasks by different SAV/EAV codes. This bit can also
be seen as ‘task flag’ on pins IGP0 (IGP1), if TASK output is selected.
•
•
Basically the trigger conditions are checked, when a task is activated. It is
important to realize, that they are not checked while a task is inactive. So you can not
trigger to next logic 0 or logic 1 with overlapping offset and active video ranges
between the tasks (e.g. task A STRC[1:0] = 2, YO[11:0] = 310 and task B
STRC[1:0] = 3, YO[11:0] = 310 results in output field rate of
After power-on or software reset (via SWRST[88h[5]]) task B gets priority over
task A.
Rev. 04 — 4 July 2008
Multistandard video decoder with adaptive comb filter
Section
50
3
Hz).
8.4.3.
SAF7118
© NXP B.V. 2008. All rights reserved.
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