SAA7128H/V1,557 NXP Semiconductors, SAA7128H/V1,557 Datasheet

SAA7128H/V1,557

Manufacturer Part Number
SAA7128H/V1,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7128H/V1,557

Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
PQFP
Pin Count
44
Lead Free Status / RoHS Status
Compliant
1. General description
2. Features
The SAA7128H; SAA7129H encodes digital C
SECAM CVBS or S-video signal. Simultaneously, RGB or bypassed but interpolated
C
multiplexed digital D1 input port accepts two ITU-R BT.656 compatible C
streams with 720 active pixels per line in 4 : 2 : 2 multiplexed formats, for example MPEG
decoded data with overlay and MPEG decoded data without overlay, where one data
stream is latched at the rising clock edge and the other at the falling clock edge.
It includes a sync/clock generator and on-chip DACs.
R
-Y-C
SAA7128H; SAA7129H
Digital video encoder
Rev. 03 — 9 December 2004
Monolithic CMOS 3.3 V device, 5 V I
Digital PAL/NTSC/SECAM encoder
System pixel frequency 13.5 MHz
54 MHz double-speed multiplexed D1 interface capable of splitting data into two
separate channels (encoded and baseband)
Three Digital-to-Analog Converters (DACs) for CVBS (CSYNC), VBS (CVBS) and C
(CVBS) two times oversampled with 10-bit resolution (signals in brackets optional)
Three DACs for RED (C
9-bit resolution (signals in brackets optional)
An advanced composite sync is available on the CVBS output for RGB display
centering
Real-time control of subcarrier
Cross-color reduction filter
Closed captioning encoding and World Standard Teletext (WST) and North-American
Broadcast Text System (NABTS) teletext encoding including sequencer and filter
Copy Generation Management System (CGMS) encoding (CGMS described by
standard CPR-1204 of EIAJ); 20 bits in lines 20/283 (NTSC) can be loaded via I
Fast I
Line 23 Wide Screen Signalling (WSS) encoding
Video Programming System (VPS) data encoding in line 16 (50/625 lines counting)
Encoder can be master or slave
Programmable horizontal and vertical input synchronization phase
Programmable horizontal sync output phase
Internal Color Bar Generator (CBG)
B
signals are available via three additional DACs. The circuit at a 54 MHz
2
C-bus control port (400 kHz)
R
), GREEN (Y) and BLUE (C
2
C-bus optional
R
-Y-C
B
video data to an NTSC, PAL or
B
) two times oversampled with
Product data sheet
R
-Y-C
B
data
2
C-bus

Related parts for SAA7128H/V1,557

SAA7128H/V1,557 Summary of contents

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SAA7128H; SAA7129H Digital video encoder Rev. 03 — 9 December 2004 1. General description The SAA7128H; SAA7129H encodes digital C SECAM CVBS or S-video signal. Simultaneously, RGB or bypassed but interpolated C -Y-C R multiplexed digital D1 input port accepts ...

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Philips Semiconductors Macrovision applies to SAA7128H only. The device is protected by US patents 4631603, 4577216 and 4819098 and other intellectual property rights; use of the Macrovision anti-copy process in the device is licensed for non-commercial home use only. Reverse ...

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RESET_N SDA SCL DD(I2C C-BUS 21 SAA7128H INTERFACE SA SAA7129H 2 I C-bus control MP pos MP7 to MP0 SWITCH MP neg C-bus control ...

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Philips Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin configuration 6.2 Pin description Table 3: Pinning Symbol Pin Type RES LLC1 supply SSD1 V 6 supply DDD1 ...

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Philips Semiconductors Table 3: Pinning …continued Symbol Pin Type MP7 9 I MP6 10 I MP5 11 I MP4 12 I MP3 13 I MP2 14 I MP1 15 I MP0 supply DDD2 V 18 supply ...

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Philips Semiconductors 7. Functional description The digital video encoder encodes digital luminance and color difference signals into analog CVBS, S-video and simultaneously RGB or C SECAM and sub-standards are supported. Both interlaced and non-interlaced operation is possible for all standards. ...

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Philips Semiconductors • Black and blanking level control • Color subcarrier frequency • Variable burst amplitude, etc. During reset (RESET_N = LOW) and after reset is released, all digital I/O stages are set to input mode and the encoder is ...

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Philips Semiconductors Fig 4. Configuration 1 7.1.1.2 Configuration 2 Input MP RGB output, while the signal coming from MP output (RGBIN = 1, ENCIN = 0). Also in this example, either MP overlay (menu) signal to be faded smoothly in ...

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Philips Semiconductors 7.1.1.4 Configuration 4 Only MP (RGBIN = ENCIN = 0). Fig 7. Configuration 4 7.1.2 Parameters of the fader Basically, there are three independent fade factors available, allowing for the equation: Output = (FADEx Where ...

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Philips Semiconductors 7.2 Data manager In the data manager, a pre-defined color look-up table located in this block can be read out in a pre-defined sequence (8 steps per active video line alternative to the external video data, ...

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Philips Semiconductors TTXRQ provides a fully programmable request signal to the teletext source, indicating the insertion period of bitstream at lines which are selectable independently for both fields. The internal insertion window for text is set to 360 (PAL-WST), 296 ...

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Philips Semiconductors Alternating phase reset in accordance with SECAM standard is carried out automatically. During vertical blanking, the so-called ‘bottle pulses’ are not provided. 7.6 Output interface/DACs In the output interface, encoded Y and C signals are converted from digital-to-analog ...

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Philips Semiconductors The horizontal phase can be set via a separate input RCV2. In the event of VS pulses at RCV1, this is mandatory also possible to set the signal path to blank via this input. From the ...

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Philips Semiconductors 7.10 Input levels and formats The SAA7128H; SAA7129H expects digital Y, C accordance with ITU-R BT.601 . For C and CVBS outputs, deviating amplitudes of the color difference signals can be compensated by an independent gain control setting, ...

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Bit allocation map Table 6: Slave receiver (slave address 88h) Register function Subaddress Status byte (read only) 00h Null 01h to 25h Wide screen signal 26h Wide screen signal 27h Real-time control, burst start 28h Burst end 29h Copy ...

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Table 6: Slave receiver (slave address 88h) …continued Register function Subaddress Fade factor other 50h Look-up table key color 2 U 51h Look-up table key color 2 V 52h Look-up table key color 2 Y 53h VPS enable, input control ...

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Table 6: Slave receiver (slave address 88h) …continued Register function Subaddress Trigger control 6Ch Trigger control 6Dh Multi control 6Eh Closed caption, teletext enable 6Fh RCV2 output start 70h RCV2 output end 71h MSBs RCV2 output 72h TTX request H ...

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Philips Semiconductors 2 7.12 I C-bus format Table 7: S SLAVE ADDRESS Table 8: Part S SLAVE ADDRESS ACK SUBADDRESS DATA -------- P [ the read/write control bit logic 0 is order to write ...

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Philips Semiconductors Table 11: Bit Table 12: Bit Table 13: Bit Table 14: Bit Table 15: Bit 7 ...

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Philips Semiconductors Table 15: Bit Table 16: Bit Table 17: Bit Table 18: Bit 9397 750 ...

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Philips Semiconductors Table 19: Bit Table 20: Address Byte 42h, 48h KEY1LU[7:0] 43h, 49h KEY1LV[7:0] 44h, 4Ah KEY1LY[7:0] Table 21: Address Byte 45h, 4Bh KEY2LU[7:0] 46h, 4Ch KEY2LV[7:0] 47h, 4Dh KEY2LY[7:0] 9397 ...

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Philips Semiconductors Table 22: Bit Table 23: Bit Table 24: Bit Table 25: Bit Table 26: Bit ...

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Philips Semiconductors Table 27: Bit Table 28: Bit Table 29: Bit Table 30: Bit Table 31: Bit Table 32: Bit ...

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Philips Semiconductors Table 33: Bit Table 34: Bit Table 35: Bit Table 36: Conditions White-to-black = 92.5 IRE GAINU[8: GAINU[8:0] = 118 (76h) White-to-black = 100 IRE GAINU[8:0] = ...

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Philips Semiconductors Table 38: Conditions GAINV[8:0] = 129 (81h) [1] All IRE values are rounded up. Table 39: Bit Table 40: Conditions White-to-sync = 140 IRE BLCKL = 0 BLCKL = 63 (3Fh) White-to-sync = ...

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Philips Semiconductors Table 42: Conditions BLNNL = 63 (3Fh) [1] All IRE values are rounded up. [2] Output black level/IRE = BLNNL [3] Output black level/IRE = BLNNL Table 43: Bit Table ...

Page 27

Philips Semiconductors Table 45: Bit Table 46: Bit Table 47: Conditions White-to-black = 92.5 IRE; burst = 40 IRE; NTSC encoding BSTA = 0 to 2.02 White-to-black = 92.5 IRE; burst = 40 ...

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Philips Semiconductors Table 48: Address 64h 65h 66h [1] Examples: a) NTSC- PAL-B/ SECAM: f Table 49: Bit Table 50: Bit Table 51: Bit Table 52: Bit ...

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Philips Semiconductors Table 53: Bit Table 54: SRCV11 Table 55: Bit 9397 750 14325 Product data sheet Subaddress 6Bh …continued Symbol Description ORCV1 0 = pin RCV1 is ...

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Philips Semiconductors Table 56: Bit Table 57: Bit Table 58: PHRES1 Table 59: LDEL1 9397 750 ...

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Philips Semiconductors Table 60: FLC1 Table 61: Bit Table 62: CCEN1 Table 63: Bit Table 64: Bit 9397 ...

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Philips Semiconductors Table 65: Bit Table 66: Bit Table 67: Bit Table 68: Bit Table 69: Bit 7 ...

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Philips Semiconductors Table 70: Bit Table 71: Bit Table 72: Bit Table 73: Bit Table 74: Bit 9397 750 14325 Product data sheet Subaddress 77h ...

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Philips Semiconductors Table 75: Bit Table 76: Bit Table 77: Bit 9397 750 14325 Product data sheet Subaddress 7Ch Symbol Description TTX60 0 = enables NABTS ...

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Philips Semiconductors 7.14 Slave transmitter The slave transmitter slave address is 89h. Table 78: Bit (dB) (1) SCBW = 1 (2) SCBW = 0 Fig 8. Chrominance transfer characteristic 1 9397 ...

Page 36

Philips Semiconductors (1) SCBW = 1 (2) SCBW = 0 Fig 9. Chrominance transfer characteristic 2 G (dB) (1) CCRS1 = 0; CCRS0 = 1 (2) CCRS1 = 1; CCRS0 = 0 (3) CCRS1 = 1; CCRS0 = 1 (4) ...

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Philips Semiconductors (1) CCRS1 = 0; CCRS0 = 0 Fig 11. Luminance transfer characteristic 2 G (dB) Fig 12. Luminance transfer characteristic in RGB 9397 750 14325 Product data sheet (dB ...

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Philips Semiconductors G (dB) Fig 13. Color difference transfer characteristic in RGB G (dB) Fig 14. Gain of SECAM pre-emphasis 9397 750 14325 Product data sheet ...

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Philips Semiconductors (deg) Fig 15. Phase of SECAM pre-emphasis G (dB) Fig 16. Gain of SECAM anti-Cloche 9397 750 14325 Product data sheet 0 0.4 Rev. 03 ...

Page 40

Philips Semiconductors (deg) Fig 17. Phase of SECAM anti-Cloche (1) HTRIG = 0 (2) PRCV2 = 0 (3) TRCV2 = 1 (4) ORCV2 = 0 Fig 18. Sync and video input timing 9397 750 14325 Product data sheet 80 60 ...

Page 41

Philips Semiconductors (1) RCV2S = 0 (2) PRCV2 = 0 (3) ORCV2 = 1 Fig 19. Sync and video output timing 8. Limiting values Table 79: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). All ground ...

Page 42

Philips Semiconductors 10. Characteristics Table 81: Characteristics unless otherwise specified. DDD amb Symbol Parameter Supply V analog supply voltage DDA V digital supply voltage DDD I ...

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Philips Semiconductors Table 81: Characteristics …continued unless otherwise specified. DDD amb Symbol Parameter C load capacitance L R series resistance S C motional capacitance (typical) mot ...

Page 44

Philips Semiconductors LLC1 t SU; DAT MP MP input data output data valid Fig 20. Clock data timing LLC MP(n) RCV2 The data demultiplexing phase is coupled to the internal horizontal phase. The phase of the RCV2 signal is programmed ...

Page 45

Philips Semiconductors • If the odd/even bit is enabled (RTCE = 1; DECOE = 1), the SAA7128H; SAA7129H ignores its internally generated odd/even flag and takes the odd/even bit from RTCI input. • If the color detection bit is enabled ...

Page 46

Philips Semiconductors 10.2 Teletext timing Time t FD VBS output signal, such that it appears at t after the leading edge of the horizontal synchronization pulse. Time t PD order to deliver TTX data. This delay is programmable by register ...

Page 47

DGND 3.3 V digital use one capacitor 27.0 MHz 1 nF for each V X1 3rd harmonic V DDD1 XTALI XTALO 17, 39 digital SAA7128H inputs and SAA7129H outputs (1) Typical ...

Page 48

Philips Semiconductors 11.1 Analog output voltages The analog output voltages are dependent on the open-loop voltage of the operational amplifiers for full-scale conversion (typical value 1.35 V), the internal series resistor (typical value 2 ), the external series resistor and ...

Page 49

Philips Semiconductors 12. Package outline QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 1. pin 1 index DIMENSIONS (mm are the original dimensions) A ...

Page 50

Philips Semiconductors 13. Soldering 13.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...

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Philips Semiconductors – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, ...

Page 52

Philips Semiconductors [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, ...

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Philips Semiconductors 14. Revision history Table 84: Revision history Document ID Release date SAA7128H_SAA7129H_3 20041209 • Modifications: • • SAA7128H_7129H_2 20021015 SAA7128H_7129H_1 000308 9397 750 14325 Product data sheet Data sheet status Product data sheet Added Table 79 “Limiting values” ...

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Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

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Philips Semiconductors 22. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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