L-USS820D-DB LSI, L-USS820D-DB Datasheet - Page 46

• Manufacturer Part Number: L-USS820D-DB
• Manufacturer: LSI

Specifications of L-USS820D-DB

• Operating Temperature (min): -20C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 85C
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

USS-820D
USB Device Controller
Application Notes
1. The RESET input must remain asserted for a minimum period of time after power is stable. If internal oscillator
2. After changing the size (RXFFSZ/TXFFSZ), type (isochronous vs. nonisochronous), enabled status (RXEPEN/
3. Register writes are triggered by the rising edge of either WRN or IOCSN, whichever comes first, and are synchro-
4. The IRQN and SOFN pins require external pull-ups or pull-downs if the external controller will be powered off dur-
5. In applications where the external controller is powered off during SUSPEND (firmware has set SSR.SUSPPO),
USB Application Support Contact Information
E-mail: [e-mail]
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-
lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of
those given in the operations sections of this data sheet. Exposure to absolute maximum ratings for extended peri-
ods can adversely affect device reliability.
Table 41. Absolute Maximum Ratings
Table 42. Absolute Maximum Voltage Ratings (0 °C ≤ T
Table 43. Absolute Maximum Voltage Ratings (–20 °C ≤ T
* A persistent voltage level is considered to be one which lasts for more than 25 ns.
46
46
Ambient Operating Temperature Range
Storage Temperature
Power Supply Voltage with Respect to Ground
Voltage on Any Non-USB Pin with Respect to Ground
Persistent* Voltage on Any Non-USB Pin with Respect to
Non-persistent* Voltage on Any Non-USB Pin with
Ground
Respect to Ground
clocking mode is used, this time is t
become stable. If external oscillator clocking mode is used, this time is t
pins must not both be active (low) at the time that the RESET input is deasserted.
TXEPEN) of a FIFO/endpoint or chip features (FEAT, BDFEAT), firmware must guarantee that at least 16 t
periods have elapsed before attempting to access the FIFO data. This is required to allow the internal FIFO RAM
to be reallocated.
nized to the internal 12 MHz clock. Therefore, the actual write may not occur until as much as t
first rising edge. This latency must be taken into account when performing subsequent register reads or writes.
ing SUSPEND. In that situation, those pins will be tristated until the USS-820D has fully resumed. The pull-up or
pull-down is needed to establish the desired level at the controller for the time interval from when the controller is
powered on to the time when the USS-820D has completed the RESUME. The same requirements hold for the
USBR and DSA outputs if they are connected to devices that will be powered off during SUSPEND.
the SOFN pin must be connected to an external pull-down even if the pin is not functionally required. The pin is
actually bidirectional, where the input mode is only used in chip test modes. The pull-down is required to avoid
excessive power consumption by the input stage when the device is suspended.
Parameter
Parameter
Parameter
OSC
, the amount of time required to allow the internal oscillator output to
A
≤ 85 °C)
A
Symbol
Symbol
Symbol
≤ 0 °C)
V
T
T
—
—
—
stg
DD
A
RST
V
V
V
SS
SS
SS
Min
Min
Min
. The USS-820D WRN and RWUPN
–20
−40
—
− 0.3
− 0.3
− 0.3
Data Sheet, Rev. 7
Max
Max
Max
125
4.2
5.5
3.6
5.5
85
September 2004
Agere Systems Inc.
CLK
ns after that
Unit
Unit
Unit
°C
°C
V
V
V
V
CLK