MT45W4MW16BBB-706 WT Micron Technology Inc, MT45W4MW16BBB-706 WT Datasheet - Page 18
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MT45W4MW16BBB-706 WT
Manufacturer Part Number
MT45W4MW16BBB-706 WT
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT45W4MW16BBB-706_WT.pdf
(61 pages)
Specifications of MT45W4MW16BBB-706 WT
Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
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Figure 14:
PDF: 09005aef80be1fbd/Source: 09005aef80be2036
Burst CellularRAM_2.fm - Rev. G 10/05 EN
(except A19)
DQ[15:0]
LB#/UB#
A[21:0]
ADV#
WAIT
A19
WE#
OE#
CLK
CRE
CE#
Configuration Register WRITE in Synchronous Mode Followed by READ ARRAY
2
High-Z
Notes: 1. Non-default BCR settings for configuration register WRITE in synchronous mode followed
Latch Control Register Value
t CSP
t SP
t SP
t SP
OPCODE
t SP
t CW
2. A[19] = LOW to load RCR; A[19] = HIGH to load BCR.
3. CE# must remain LOW to complete a burst-of-one WRITE. WAIT must be monitored—addi-
t HD
t HD
t HD
t HD
Operation
by READ ARRAY operation: Latency code two (three clocks); WAIT active LOW; WAIT
asserted during delay.
tional WAIT cycles caused by refresh collisions require a corresponding number of addi-
tional CE# LOW cycles.
64Mb: 4 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
Latch Control Register Address
18
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CBPH
High-Z
3
ADDRESS
ADDRESS
Configuration Registers
©2003 Micron Technology, Inc. All rights reserved.
DON’T CARE
VALID
DATA
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