MT18LSDT1672AG10E Micron Technology Inc, MT18LSDT1672AG10E Datasheet
MT18LSDT1672AG10E
Specifications of MT18LSDT1672AG10E
Related parts for MT18LSDT1672AG10E
MT18LSDT1672AG10E Summary of contents
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... SYNCHRONOUS DRAM MODULE Features • PC100- and PC133-compliant • 168-pin, dual in-line memory module (DIMM) • Unbuffered, ECC-optimized pinout • 64MB (8 Meg x 72) and 128MB (16 Meg x 72) • Single +3.3V power supply • Fully synchronous; all signals registered on positive edge of system clock • ...
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... Designators for component and PCB revision are the last two characters of each part number Consult factory for current revision codes. Example: MT9LSDT872AG-133B1. 09005aef807b3709 SD9_18C8_16x72AG.fm - Rev. E 6/04 EN 64MB x72, ECC, SR), 128MB (x72, ECC, DR) MODULE DENSITY CONFIGURATION 64MB 8 Meg x 72 64MB 8 Meg x 72 ...
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Table 4: Pin Assignment (168-Pin DIMM Front) PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL CB1 DQ0 DQ1 DQ2 DQ3 26 ...
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... The address inputs also provide the op-code during a MODE REGISTER SET command. SCL Input Serial Clock for Presence-Detect: SCL is used to synchronize the presence-detect data transfer to and from the module. SA0–SA2 Input Presence-Detect Address Inputs: These pins are used to configure the presence-detect device. ...
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Table 6: Pin Descriptions Pin numbers may not correlate with symbols; refer to the Pin Assignment tables on page 3 for more information PIN NUMBERS 6, 18, 26, 40, 41, 49, 59, 73, 84, 90, 102, 110, 124, 133, 143, ...
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... CKE0 WE# A0-A11 BA0 BA1 Note: 1. All resistor values are 10 unless otherwise specified. 2. Per industry standard, Micron modules use various component speed grades as referenced in the module part numbering guide at support/numbering.html. 09005aef807b3709 SD9_18C8_16x72AG.fm - Rev. E 6/04 EN 64MB x72, ECC, SR), 128MB (x72, ECC, DR) DQMB0 DQMB4 ...
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... BA0: SDRAMs BA0 BA1: SDRAMs BA1 Note: 1. All resistor values are 10 unless otherwise specified. 2. Per industry standard, Micron modules use various component speed grades as referenced in the module part numbering guide at support/numbering.html. 09005aef807b3709 SD9_18C8_16x72AG.fm - Rev. E 6/04 EN 64MB x72, ECC, SR), 128MB (x72, ECC, DR) ...
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... SDRAM UDIMM 2,048-bit EEPROM. This nonvolatile storage device contains 256 bytes. The first 128 bytes can be pro- grammed by Micron to identify the module type and various SDRAM organizations and timing parameters. The remaining 128 bytes of storage are available for use by the customer. System READ/WRITE operations ...
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Mode register bits M0–M2 specify the burst length, M3 specifies the type of burst (sequential or inter- leaved), M4–M6 specify the CAS latency, M7 and M8 specify the operating mode, M9 specifies the write burst mode, and M10 and M11 ...
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Table 7: Burst Definition Table STARTING BURST COLUMN ORDER OF ACCESSES WITHIN LENGTH ADDRESS TYPE = SEQUENTIAL 0 0-1-2 1-2-3 2-3-0 3-0-1 ...
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Operating Mode The normal operating mode is selected by setting M7 and M8 to zero; the other combinations of values for M7 and M8 are reserved for future use and/or test modes. The programmed burst length applies to both READ ...
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Commands The Truth Table, below, provides a quick reference of available commands. This is followed by written description of each command. For a more detailed Table 9: SDRAM Commands and DQMB Operation Truth Table CKE is HIGH for all commands ...
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Absolute Maximum Ratings Stresses greater than those listed may cause perma- nent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the opera- ...
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... CKE = HIGH; CS# = HIGH SELF REFRESH CURRENT: CKE 0.2V NOTE Value calculated as one module rank in this condition, and all other module ranks in Power-Down Mode ( Value calculated reflects all module ranks in this condition. 09005aef807b3709 SD9_18C8_16x72AG.fm - Rev. E 6/04 EN 64MB x72, ECC, SR), 128MB (x72, ECC, DR) ...
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Table 14: Capacitance – 64MB . Note 2; notes appear on page 18 PARAMETER Input Capacitance: Address and Command Input Capacitance: CK0 Input Capacitance: CK2 Input Capacitance: S0# Input Capacitance: S2# Input Capacitance: CKE Input Capacitance: DQMB0, 2– ...
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... Table 16: Electrical Characteristics and Recommended AC Operating Conditions Notes 11, 32; notes appear on page 18 Module AC timing parameters comply with PC100 and PC133 Design Specs, based on component parameters ACCHARACTERISTICS PARAMETER Access timefrom CLK (pos.edge) CL= 3 CL= 2 Address hold time Address setup time CLK high-level width ...
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Table 17: AC Functional Characteristics Notes 11, 32; notes appear on page 18 PARAMETER READ/WRITE command to READ/WRITE command CKE to clock disable or power-down entry mode CKE to clock enable or power-down exit setup ...
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... RAS used in -13E speed grade mod ules is calculated from possible through the module pin, not what each memory device contributes. Micron Technology, Inc., reserves the right to change products or specifications without notice. t RP; clock( for a pulse under ...
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SPD Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions (as shown in Figure 7, Data Validity, and Figure ...
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Table 18: EEPROM Device Select Code The most significant bit (b7) is sent first SELECT CODE Memory Area Select Code (two arrays) Protection Register Select Code Table 19: EEPROM Operating Modes MODE RW BIT Current Address Read RandomAddressRead Sequential Read ...
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Table 20: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced DDSPD PARAMETER/CONDITION SUPPLY VOLTAGE INPUT HIGH VOLTAGE: Logic 1; All inputs INPUT LOW VOLTAGE: Logic 0; All inputs OUTPUT LOW VOLTAGE 3mA ...
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... Memory Type 3 Number of Row Addresses 4 Number of Column Addresses 5 Number of Module Ranks 6 Module Data Width 7 Module Data Width (Continued) 8 Module Voltage Interface Levels 9 t SDRAM Cycle Time, CK (CAS Latency = 3) 10 SDRAM Access From CLK, (CAS Latency = 3) 11 Module Configuration Type 12 Refresh Rate/Type ...
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... Module Serial Number 99-125 Manufacturer-Specific Data (RSVD) 126 System Frequency 127 SDRAM Component & Clock Detail NOTE The value of RAS used for -13E modules is calculated from 09005aef807b3709 SD9_18C8_16x72AG.fm - Rev. E 6/04 EN 64MB x72, ECC, SR), 128MB (x72, ECC, DR) = +3.3V ±0.3V DD ENTRY (VERSION) 64MB ...
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... ECC, SR), 128MB (x72, ECC, DR) FRONT VIEW 5.256 (133.50) 5.244 (133.20 1.661 (42.18) 0.039 (1.00)R 0.039 (1.00) (2X) 4.550 (115.57) BACK VIEW No Components This Side of Module MAX or typical where noted. MIN 24 168-PIN SDRAM UDIMM U8 U9 1.381 (35.08) 1.369 (34.77) 0.700 (17.78) TYP U10 0.128 (3.25) (2X) ...
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Figure 12: 168-Pin DIMM Dimensions – Dual-Rank 0.079 (2.00 (2X) 0.118 (3.00) (2X) 0.118 (3.00) TYP 0.250 (6.35) TYP 0.118 (3.00) TYP 2.625 (66.68) PIN 1 U12 U11 PIN 168 NOTE: All dimensions in inches (millimeters); Data ...