MT9HTF6472PY-667F1 Micron Technology Inc, MT9HTF6472PY-667F1 Datasheet - Page 20

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MT9HTF6472PY-667F1

Manufacturer Part Number
MT9HTF6472PY-667F1
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT9HTF6472PY-667F1

Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240RDIMM
Device Core Size
72b
Organization
64Mx72
Total Density
512MByte
Chip Density
512Mb
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
1.62A
Number Of Elements
9
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Compliant
Register and PLL Specifications
Table 14: Register Specifications
SSTU32866 devices or equivalent
PDF: 09005aef82250868
htf9c32_64_128x72.pdf - Rev. F 3/10 EN
Parameter
DC high-level
input voltage
DC low-level
input voltage
AC high-level
input voltage
AC low-level
input voltage
Output high
voltage
Output low voltage
Input current
Static standby
Static operating
Dynamic operating
(clock tree)
Dynamic operating
(per each input)
Input capacitance
(per device, per pin)
Input capacitance
(per device, per pin)
Symbol
Note:
V
V
V
V
I
I
V
IH(DC)
IH(AC)
V
IL(DC)
IL(AC)
I
I
DDD
DDD
C
C
DD
DD
OH
I
OL
IN
IN
I
256MB, 512MB, 1GB (x72, ECC, SR) 240-Pin DDR2 SDRAM RDIMM
1. Timing and switching specifications for the register listed are critical for proper opera-
Control, command,
Control, command,
Control, command,
Control, command,
tion of the DDR2 SDRAM RDIMMs. These are meant to be a subset of the parameters for
the specific device used on the module. Detailed information for this register is available
in JEDEC standard JESD82.
All inputs except
Parity output
Parity output
address
address
address
address
All pins
All pins
All pins
RESET#
RESET#
Pins
N/A
N/A
I
V
RESET# = V
O
switching at
switching 50% duty cy-
I
RESET# = V
V
= 0; CK and CK# switch-
= V
cle; One data in/out
ing 50% duty cycle
V
I
= V
I
V
or V
V
RESET# = V
RESET# = V
0; CK and CK#
20
IH(AC)
= V
I
I
Condition
V
duty cycle
= V
= V
IH(DC)
LVCMOS
LVCMOS
SSTL_18
SSTL_18
SSTL_18
SSTL_18
DD
REF
IL(DC)
DD
DD
SS
or V
= 1.8V
±250mV;
; V
SSQ
or V
t
or V
or V
CK/2, 50%
I
o
IL(DC)
I
Micron Technology, Inc. reserves the right to change products or specifications without notice.
(I
= 0
DD
DD
= V
IL(AC)
o
SS
SS
;
;
= 0)
IH(AC)
, I
O
,
Register and PLL Specifications
=
manufacturer
V
V
REF(DC)
REF(DC)
Varies by
Min
1.2
2.5
–5
0
+ 125
+ 250
© 2003 Micron Technology, Inc. All rights reserved.
manufacturer
manufacturer
manufacturer
V
V
V
REF(DC)
REF(DC)
Varies by
Varies by
Varies by
DDQ
Max
100
0.5
0.5
3.5
5
+ 250
- 125
- 250
Units
mV
mV
mV
mV
mA
mA
µA
µA
µA
pF
pF
V
V

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