FW82801BA S L5WK Intel, FW82801BA S L5WK Datasheet - Page 141

• Manufacturer Part Number: FW82801BA S L5WK
• Manufacturer: Intel

Specifications of FW82801BA S L5WK

• Lead Free Status / RoHS Status: Not Compliant

5.12
5.12.1
5.12.1.1
5.12.1.2
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
Note: The 16-clock counter for INIT# assertion halts while STPCLK# is active. Therefore, if INIT# is
Processor Interface (D31:F0)
The ICH5 interfaces to the processor with a variety of signals
Most ICH5 outputs to the processor use standard buffers. The ICH5 has separate V_CPU_IO
signals that are pulled up at the system level to the processor voltage, and thus determines V
the outputs to the processor. Note that this is different than previous generations of chips, that have
used open-drain outputs. This new method saves up to 12 external pull-up resistors.
The ICH5 also handles the speed setting for the processor by holding specific signals at certain
states just prior to CPURST going inactive. This avoids the glue often required with other chipsets.
The ICH5 does not support the processor’s FRC mode.
Processor Interface Signals
This section describes each of the signals that interface between the ICH5 and the processor(s).
Note that the behavior of some signals may vary during processor reset, as the signals are used for
frequency strapping.
A20M# (Mask A20)
The A20M# signal is active (low) when both of the following conditions are true:
The A20GATE input signal is expected to be generated by the external microcontroller (KBC).
INIT# (Initialization)
The INIT# signal is active (driven low) based on any one of several events described in
When any of these events occur, INIT# is driven low for 16 PCI clocks, then driven high.
supposed to go active while STPCLK# is asserted, it actually goes active after STPCLK# goes
inactive.
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Standard Outputs to processor: A20M#, SMI#, NMI, INIT#, INTR, STPCLK#, IGNNE#,
CPUSLP#, CPUPWRGD
Standard Input from processor: FERR#
The ALT_A20_GATE bit (Bit 1 of PORT92 register) is a 0
The A20GATE input signal is a 0
Functional Description
Table
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