FW82801BA S L5WK Intel, FW82801BA S L5WK Datasheet - Page 204

• Manufacturer Part Number: FW82801BA S L5WK
• Manufacturer: Intel

Specifications of FW82801BA S L5WK

• Lead Free Status / RoHS Status: Not Compliant

Functional Description
5.19.3
5.19.4
5.19.4.1
5.19.4.2
204
Figure 22. USB Data Encoding
Data Encoding and Bit Stuffing
The USB employs NRZI data encoding (Non-Return to Zero Inverted) when transmitting packets.
In NRZI encoding, a 1 is represented by no change in level and a 0 is represented by a change in
level. A string of 0s causes the NRZI data to toggle each bit time. A string of 1s causes long periods
with no transitions in the data. In order to ensure adequate signal transitions, bit stuffing is
employed by the transmitting device when sending a packet on the USB. A 0 is inserted after every
six, consecutive, 1s in the data stream before the data is NRZI encoded to force a transition in the
NRZI data stream. This gives the receiver logic a data transition at least once every seven bit times
to guarantee the data and clock lock. A waveform of the data encoding is shown in
Bit stuffing is enabled beginning with the Sync Pattern and throughout the entire transmission. The
data 1 that ends the Sync Pattern is counted as the first one in a sequence. Bit stuffing is always
enforced, without exception. If required by the bit stuffing rules, a 0 bit is inserted even if it is the
last bit before the end-of-packet (EOP) signal.
Bus Protocol
Bit Ordering
Bits are sent out onto the bus least significant bit (LSb) first, followed by next LSb, through to the
most significant bit (MSb) last.
SYNC Field
All packets begin with a synchronization (SYNC) field, which is a coded sequence that generates a
maximum edge transition density. The SYNC field appears on the bus as IDLE followed by the
binary string “KJKJKJKK,” in its NRZI encoding. It is used by the input circuitry to align
incoming data with the local clock and is defined to be 8 bits in length. SYNC serves only as a
synchronization mechanism and is not shown in the following packet diagrams. The last two bits in
the SYNC field are a marker that is used to identify the first bit of the PID. All subsequent bits in
the packet must be indexed from this point.
Bit Stuffed Data
NRZI Data
CLOCK
Data
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
Figure
22.