E82802AB8 Intel, E82802AB8 Datasheet - Page 44

• Manufacturer Part Number: E82802AB8
• Manufacturer: Intel

Specifications of E82802AB8

• Lead Free Status / RoHS Status: Not Compliant

Intel
5.4.1.6.
5.4.1.7.
44
Table 18.
®
82802AB/AC Firmware Hub
Note:
Abort Operations
Intel FWH Cycle Timing Information
FWH4 active (low) indicates either that a START cycle will eventually occur or that an abort is in
progress. In either case, if FWH4 is asserted, the Intel FWH will “immediately” tri-state its outputs and
the FWH state machine will reset.
During a write cycle, there is a possibility that an internal flash write or erase operation is in progress (or
has just been initiated). If FWH4 is asserted during this time frame, the internal operation will not abort.
The software must send an explicit flash command to terminate or suspend the operation.
The internal FWH state machine will not initiate a flash write or erase operation until it has received the
last data nibble from the chipset. This means that FWH4 can be asserted as late as this cycle (“cycle 12”)
and no internal flash operation will be attempted. However, since the Intel FWH will start “processing”
incoming data before it generates its SYNC field, it should be considered a non-buffered peripheral
device.
Refer to Figure Figure 12 and Figure 13.
1.
2.
3.
TCSPL
TPLQZ
Symbol
TCHQV
TCHQX
TCHQZ
TDVCH
TCHDX
TAVCH
TCHAX
TVSPL
Signal Timing Parameters
Minimum and maximum times have different loads. See the PCI specification.
For purposes of active/float timing measurements, the Hi-Z or “off” state is defined as the state
where the total current delivered through the component pin is less than or equal to the leakage
current specification.
This parameter applies to any input type (excluding CLK).
“PCI Symbol”
t
t
rst-clk
rst-off
t
t
t
t
t
val
t
on
off
su
rst
h
CLK to data out
CLK to active
(float to active delay)
CLK to inactive
(active to float delay)
Input setup time
Input hold time
Reset active time after
power stable
Reset active time after
CLK stable
Reset active to output
float delay
Parameter
Condition
Min.
100
2
2
7
0
1
Max.
11
28
48
Units
ms
ns
ns
ns
ns
ns
µs
ns
Notes
1
2
2
3
3
2
Datasheet
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