ISP1581BD,557 NXP Semiconductors, ISP1581BD,557 Datasheet - Page 64

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ISP1581BD,557

Manufacturer Part Number
ISP1581BD,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1581BD,557

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
9397 750 13462
Product data
Fig 24. GDMA slave mode timing (BURST = 01H, MODE = 02H).
Fig 25. GDMA slave mode timing (BURST > 01H, MODE = 00H).
DREQ is asserted for every transfer.
Data strobe: DACK (read/write).
(1) Programmable polarity: shown as active LOW.
(2) Programmable polarity: shown as active HIGH.
DREQ is asserted once per N transfers (N is determined by the BURST value). Example shown here: N = 2.
Data strobes: DIOR (read), DIOW (write).
(1) Programmable polarity: shown as active LOW.
(2) Programmable polarity: shown as active HIGH.
(write) DATA [ 15:0 ]
(write) DATA [ 15:0 ]
(read) DATA [ 15:0 ]
(read) DATA [ 15:0 ]
DIOR/DIOW
DIOR/DIOW
DREQ
DREQ
DACK
DACK
(2)
(1)
(1)
(2)
(1)
(1)
HIGH
t su1
t su1
t su3
t d2
t d2
t w1
t w1
t su2
t su2
Rev. 06 — 23 December 2004
t h2
t h2
t w2
t w2
t h3
t
h3
T cy1
T cy1
t h1
Hi-Speed USB peripheral controller
t d1
t d1
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
t h1
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