ZPSD511B1C15J STMicroelectronics, ZPSD511B1C15J Datasheet - Page 26

• Manufacturer Part Number: ZPSD511B1C15J
• Manufacturer: STMicroelectronics

Specifications of ZPSD511B1C15J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

The PSD5XX
Architecture
(cont.)
9.1.2.3 Port E Macrocell Structure
Figure 10 shows the PE Macrocell block, which consists of 8 identical macrocells. Each
macrocell output can be connected to its own I/O pin on Port E. There are 3 user
programmable global product terms output from the GPLD’s AND ARRAY which are shared
by all the macrocells in Port E:
Two other inputs, CLKIN and MACRO-RST, are used as clock and clear inputs to the D flip
flop. The CLKIN comes directly from the CLKIN input pin. The MACRO-RST is the same as
the Reset input pin except it is user configurable.
The circuit of a PE Macrocell is shown in Figure 11. There are 4 product terms from the
GPLD’s AND ARRAY as input to the macrocell. Users can select the polarity of the output
and configure the macrocell to operate as:
The two global product terms assigned for asynchronous clear (PE.RE) and preset (PE.PR)
are mainly for proper PE Macrocell initialization.
The macrocell flip-flop can also be cleared during reset by MACRO-RST, if such an option
is chosen. The clock source is always the input clock CLKIN.
PE.OE
Enable or tri-state Port PE output pins
PE.PR
Preset D flip flop in the macrocells
PE.RE
Reset/Clear D flip flop in the macrocells
Registered Output
Select output from D flip flop
Combinatorial Output
Select output from OR gate
GPLD Input
Use Port E pin as dedicated input
GPLD Output
Use Port E pin as dedicated output
GPLD I/O
Use Port E pin as bidirectional pin
Macrocell Feedback
Register feedback for state machine implementations or expander feedback from the
combinatorial output, to possibly expand the number of product terms available to
another macrocell.
In case of "Buried Feedback", where the output of the macrocell is not connected
to Port E pin, Port E can be configured to perform other user defined I/O functions.
If pins PE0 and PE1 are used as bus control signal inputs (ALE, PSEN/BHE), the
corresponding macrocells' feedbacks are disabled. The bus control signals are
connected to the ZPLD Input Bus.
PSD5XX Family
23